Patent US5008566A successfully refreshed from Google Patents.
US5008566A
Expired / Lapsed
US
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Power supply voltage drop detection circuit for use in EEPROM memory
Assignee: NEC Electronics Corp
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Filing: 1989-11-30
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Granted: 1991-04-16
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Expires: 2009-11-30
Abstract
Abstract A power supply voltage drop detection circuit has first and second N-channel field-effect-transistors. The drain of the first N-channel FET is connected to a power supply voltage line and its gate to ground. The drain of the second N-channel FET connected to the source of the first N-channel FET and its source is connected to the ground. A control voltage to the gate of the second N-channel FET maintains the second N-channel FET conducting. A P-channel field-effect-transistor has its source connected to the power supply voltage line and its gate connected to a connection node between the first and second N-channel field-effect-transistors. A third N-channel FET has its drain connected to the drain of the P-channel FET and its source connected to the ground. The gate of the third N-channel FET receives a controlled gate voltage which maintains the third N-channel FET conducting. An inverter has its input connected to a node between the P-channel FET and the third N-channel FET. The inverter output generates a signal indicative of the power supply voltage drop.
Inventors
- 👤 Kiyokazu Hashimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 14:49
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/30; G11C5/00; G11C5/14; G11C5/143; H; H03; H03K; H03K17/00; H03K17/22; H03K17/223
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
255 words
A power supply voltage drop detection circuit comprising a first N-channel field-effect-transistor of a depletion type having a drain connected to a power supply voltage line and a gate connected to ground, said first N-channel field-effect-transistor having a threshold whose absolute value has a positive temperature characteristic, a second N-channel field-effect-transistor having a drain connected to a source of the first N-channel field-effect-transistor and a source connected to the ground, a gate of the second N-channel field-effect-transistor being connected to receive a controlled gate voltage which ceaselessly maintains the second N-channel field-effect-transistor in a conducting condition, a P-channel field-effect-transistor of an enhancement type having a source connected to the power supply voltage line and a gate connected to a connection node between the first and second N-channel field-effect-transistors, said P-channel field-effect-transistor having a threshold whose absolute value has a negative temperature characteristic, a third N-channel field-effect-transistor having a drain connected to a drain of the P-channel field-effect-transistor and a source connected to the ground, a gate of the third N-channel field-effect-transistor being connected to receive a controlled gate voltage whose ceaselessly maintains the third N-channel field-effect-transistor in a conducting condition, and an inverter having an input connected to a connection node between the P-channel field-effect-transistor and a third N-channel field-effect-transistor and having an output generating a signal which is a function of the sum of the absolute value of the threshold of the first N-channel field-effect-transistor and the absolute value of the threshold of the P-channel field-effect-transistor and indicative of a power supply voltage drop.
Claim 2
Dependent Claim
255 words
A power supply voltage drop detection circuit comprising a first N-channel field-effect-transistor of a depletion type having a drain connected to a power supply voltage line and a gate connected to ground, said first N-channel field-effect-transistor having a threshold whose absolute value has a positive temperature characteristic, a second N-channel field-effect-transistor having a drain connected to a source of the first N-channel field-effect-transistor and a source connected to the ground, a gate of the second N-channel field-effect-transistor being connected to receive a controlled gate voltage which ceaselessly maintains the second N-channel field-effect-transistor in a conducting condition, a P-channel field-effect-transistor of an enhancement type having a source connected to the power supply voltage line and a gate connected to a connection node between the first and second N-channel field-effect-transistors, said P-channel field-effect-transistor having a threshold whose absolute value has a negative temperature characteristic, a third N-channel field-effect-transistor having a drain connected to a drain of the P-channel field-effect-transistor and a source connected to the ground, a gate of the third N-channel field-effect-transistor being connected to receive a controlled gate voltage whose ceaselessly maintains the third N-channel field-effect-transistor in a conducting condition, and an inverter having an input connected to a connection node between the P-channel field-effect-transistor and a third N-channel field-effect-transistor and having an output generating a signal which is a function of the sum of the absolute value of the threshold of the first N-channel field-effect-transistor and the absolute value of the threshold of the P-channel field-effect-transistor and indicative of a power supply voltage drop.
Claim 3
Dependent Claim
36 words
A circuit claimed in claim 1 wherein each of the second and third N-channel field-effect-transistors is of a depletion type, and a gate of each of the second and third N-channel field-effect-transistors is connected to ground.
Claim 4
Dependent Claim
37 words
A circuit claimed in claim 1 wherein the second N-channel field-effect-transistor has a resistance high than that of the first N-channel field-effect-transistor and the third N-channel field-effect-transistor has a resistance high than that of the P-channel field-effect-transistor.
Claim 5
Dependent Claim
181 words
A power supply voltage drop detection circuit comprising: a voltage divider including first and second field-effect-transistors series-connected between a supply voltage line and a ground and ceaselessly maintained in a conducting condition, one of the field-effect-transistors, which is connected to the supply voltage line, having a threshold voltage having a positive temperature characteristic; a detection circuit including a third field-effect-transistor having a threshold voltage having a negative temperature characteristic and having a gate connected to a connection node between the first and second field-effect-transistors, the third field-effect-transistor having a current path having a first end connected to the supply voltage line and a second end connected to the ground through a fourth field-effect-transistor ceaselessly maintained in a conducting condition; and an output circuit having an input connected to a connection node between the third and fourth field-effect-transistors and having an output generating a signal which is a function of the sum of the absolute value of the threshold of the first field-effect-transistor and the absolute value of the threshold of the third field-effect-transistor and indicative of a power supply voltage drop.
Claim 6
Dependent Claim
181 words
A power supply voltage drop detection circuit comprising: a voltage divider including first and second field-effect-transistors series-connected between a supply voltage line and a ground and ceaselessly maintained in a conducting condition, one of the field-effect-transistors, which is connected to the supply voltage line, having a threshold voltage having a positive temperature characteristic; a detection circuit including a third field-effect-transistor having a threshold voltage having a negative temperature characteristic and having a gate connected to a connection node between the first and second field-effect-transistors, the third field-effect-transistor having a current path having a first end connected to the supply voltage line and a second end connected to the ground through a fourth field-effect-transistor ceaselessly maintained in a conducting condition; and an output circuit having an input connected to a connection node between the third and fourth field-effect-transistors and having an output generating a signal which is a function of the sum of the absolute value of the threshold of the first field-effect-transistor and the absolute value of the threshold of the third field-effect-transistor and indicative of a power supply voltage drop.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-04-15 | 1994-10-15 | 1995-04-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-04-15 | 1998-10-15 | 1999-04-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-04-15 | 2002-10-15 | 2003-04-16 | $7700.00 | Window Closed / Lapsed |