Power supply voltage drop detector
Abstract
Abstract PURPOSE: To make possible to setting of the detection voltage flowing the dispersion of lower operating voltage of logic circuits by a signal of detecting the drop in the power supply voltage from the output of a high gain amplification circuit to which a divided voltage is inputted from a division circuit comprising an enhancement type and a depression type MISFETs. CONSTITUTION: A high gain amplification circuit 1 is composed of enhancement type MISFETs Q1WQ3 as the amplifying elements and depresion type FETs Q4W Q6 to which a gate and a drain are connected as a load. The division circuit 2 is made up of an enhancement type MISFET Q7 having the drain and the gate connected to a power supply voltage terminal Vcc and a depression type MISFET Q8 having the source and the gate connected to the reference voltage terminal (OV) connected to each other in series. With such an arrangement, the output Va of divided voltage is obtained with shifted level of the power supply voltage. The output Va is fed to the gate of FET Q1 in the circuit 1 to yield the detection signal for drop in the power supply voltage. COPYRIGHT: (C)1980,JPO&Japio
Inventors
- 👤 Toshimasa Kihara
Bibliographic Details
Claims Analysis
Total Claims: 0References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.