US5006925A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Three dimensional microelectric packaging
Assignee: International Business Machines Corp
•
Filing: 1989-11-22
•
Granted: 1991-04-09
•
Expires: 2009-11-22
Abstract
Abstract A three dimensional chip package comprising a plurality of semiconductor substrates, each having at least one semiconductor electronic device mounted thereon; wherein at least a subset of said plurality substrates are physically joined to form an enclosure within which each substrate has at least one electrical contact location to another substrate; and further wherein at least one cooling channel is provided within said enclosure into which a cooling fluid may be introduced.
Inventors
- 👤 Mark F. Bregman
- 👤 Raymond R. Horton
- 👤 Ismail C. Noyan
- 👤 Michael J. Palmer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 09:29
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W90/00; H10W90/401
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
110 words
A three-dimensional chip package comprising: (a) A plurality of semiconductor substrates, each having at least one semiconductor electronic device mounted thereon, wherein at least a subset of said plurality of semiconductor substrates are joined together to form an enclosure for housing the mounted semiconductor electronic devices; (b)) means for forming an electrical contact between at least two of said plurality of substrates; and (c) channel means, for providing at least one cooling channel within said enclosure into which a cooling fluid may be introduced, wherein at least a part of said at least one cooling channel is formed by positioning at least two semiconductor substrate surfaces to form channel walls.
Claim 2
Dependent Claim
110 words
A three-dimensional chip package comprising: (a) A plurality of semiconductor substrates, each having at least one semiconductor electronic device mounted thereon, wherein at least a subset of said plurality of semiconductor substrates are joined together to form an enclosure for housing the mounted semiconductor electronic devices; (b)) means for forming an electrical contact between at least two of said plurality of substrates; and (c) channel means, for providing at least one cooling channel within said enclosure into which a cooling fluid may be introduced, wherein at least a part of said at least one cooling channel is formed by positioning at least two semiconductor substrate surfaces to form channel walls.
Claim 3
Dependent Claim
19 words
A three-dimensional chip package as set forth in claim 1 further comprising a hermetic seal for each cooling channel.
Claim 4
Dependent Claim
18 words
A three-dimensional chip package as set forth in claim 2 wherein each hermetic seal is formed from solder.
Claim 5
Dependent Claim
28 words
A three dimensional chip package as set forth in claim 1 wherein said electrical contact is formed by a solder fillet which interconnects pads on adjacent substrate edges.
Claim 6
Dependent Claim
34 words
A three dimensional chip package as set forth in claim 4 wherein said at least one cooling channel is formed by a plurality of substrate surfaces not having any semiconductor electronic devices mounted thereon.
Claim 7
Dependent Claim
38 words
A three dimensional chip package as set forth in claim 1 wherein said electrical contact is formed by a solder connection between opposing substrate surfaces both of which have at least one of said semiconductor devices mounted thereon.
Claim 8
Dependent Claim
34 words
A three dimensional chip package as set forth in claim 5 wherein said at least one cooling channel is formed by a plurality of substrate surfaces not having any semiconductor electronic devices mounted thereon.
Claim 9
Dependent Claim
32 words
A three dimensional chip package as set forth in claim 6 wherein said channel means further comprises means for introducing and removing fluid to and from said at least one cooling channels.
Claim 10
Dependent Claim
38 words
A three dimensional chip package as set forth in claim 7 wherein said means for introducing and removing cooling fluid forms a part of said enclosure and includes apertures through which the fluid may be introduced and removed.
References Cited (Backward Citations)
JPS5438771A
Cited
US4468717A
Cited
US4571663A
Cited
US4590538A
Cited
JPS59163844A
Cited
JPS59227147A
Cited
JPS6039855A
Cited
US4694378A
Cited
US4893174A
Cited
JPS62260352A
Cited
US4922378A
Cited
US4763298A
Cited
US4868712A
Cited
US4855809A
Cited
US4891688A
Cited
US4912600A
Cited
US4880053A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-04-08 | 1994-10-08 | 1995-04-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-04-08 | 1998-10-08 | 1999-04-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-04-08 | 2002-10-08 | 2003-04-09 | $7700.00 | Window Closed / Lapsed |