Polycrystalline silicon active layer for good carrier mobility

Claim 1

A semiconductor device comprising a silicon substrate, a silicon oxide film formed on said substrate and a polycrystalline silicon transistor formed on said oxide film, wherein said transistor comprises: a first polycrystalline silicon layer having a thickness in a range between 0.5 μm to 1.5 μm and containing crystal grains having their (110) axes oriented perpendicular to a surface thereof, said first polycrystalline silicon layer being formed on said oxide film and having first asperities formed on a surface thereof; a second polycrystalline silicon layer formed on said first polycrystalline silicon layer for defining source, channel and drain regions, and having a crystallinity substantially lattice-matched to that of said first polycrystalline silicon layer, said second polycrystalline silicon layer having a structure to compensate for the asperities on the surface of said first polycrystalline silicon layer and to flatten said surface and being used as an active region; a polysilicon gate, and a gate insulating film formed with said gate through said gate insulating film on the second polycrystalline silicon layer of said channel region; source, drain and gate electrodes respectively formed on the second polycrystalline silicon layer of said source region, drain region and said polysilicon gate; and an interlayer insulator film insulating said polysilicon gate and said gate electrode at least from said source and drain electrodes.