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US4990802A Expired / Lapsed US ⏱️ 0.0 years remaining

ESD protection for output buffers

Assignee: Agere Systems LLC
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Filing: 1990-06-19
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Granted: 1991-02-05
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Expires: 2010-06-19
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Abstract

Abstract An integrated circuit obtains improved protection of output buffers against damage from electrostatic discharge (ESD). Each output buffer is connected to its bondpad by means of a resistor, and protective clamping diodes are disposed around the periphery of the bondpad. It has been found that a suitably sized resistor allows the protective diodes to discharge an ESD event before damage to the buffer occurs, by reducing current flow through the buffer, without significantly limiting performance.

Inventors

  • 👤 Yehuda Smooha

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 22:55
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 110 words
An integrated circuit comprising at least two levels of metal conductors and an output buffer having a p-channel transistor and an n-channel transistor having their drains coupled to a common buffer output node, and a bondpad connected to an external conductor, characterized in that said integrated circuit further comprises a resistor having a resistance of greater than 1 ohm connected between the drain of said n-channel transistor and said bondpad, and still further comprises voltage clamping means connected to said bondpad, wherein said resistor is a polysilicon or silicide resistor, and wherein the drain of said p-channel transistor is directly connected to said bondpad by means of a metal conductor.
Claim 2
Dependent Claim 110 words
An integrated circuit comprising at least two levels of metal conductors and an output buffer having a p-channel transistor and an n-channel transistor having their drains coupled to a common buffer output node, and a bondpad connected to an external conductor, characterized in that said integrated circuit further comprises a resistor having a resistance of greater than 1 ohm connected between the drain of said n-channel transistor and said bondpad, and still further comprises voltage clamping means connected to said bondpad, wherein said resistor is a polysilicon or silicide resistor, and wherein the drain of said p-channel transistor is directly connected to said bondpad by means of a metal conductor.
Claim 3
Dependent Claim 17 words
The integrated circuit of claim 1 wherein said resistor has a value of greater than 2 ohms.
Claim 4
Dependent Claim 17 words
The integrated circuit of claim 1 wherein said resistor has a value of less than 10 ohms.
Claim 5
Dependent Claim 17 words
The integrated circuit of claim 1 wherein said resistor has a value of less than 20 ohms.
Claim 6
Dependent Claim 24 words
The integrated circuit of claim 1 wherein said output transistors have silicided gate, source, and drain electrodes, and said resistor is a silicided resistor.
Claim 7
Dependent Claim 74 words
The integrated circuit of claim 1 wherein said voltage clamping means is a pair of diodes, wherein the first diode of said pair has a p-type anode region connected to said bondpad and an n-type cathode region connecte to a positive power supply voltage conductor, and the second diode of said pair has a n-type cathode region connected to said bondpad and a p-type anode region connected to a negative power supply voltage conductor.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-02-04 1994-08-06 1995-02-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-02-04 1998-08-06 1999-02-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-02-04 2002-08-06 2003-02-05 $7700.00 Window Closed / Lapsed

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