Method of fabricating a single polysilicon bipolar transistor which is compatible with a method of fabricating CMOS transistors

Claim 1

A method of fabricating a bipolar transistor that is compatible with a BiCMOS process, comprising the steps of: providing a semiconductor substrate having a buried layer which serves as a collector; forming a silicon dioxide layer on the substrate; forming a nitride layer on the silicon dioxide layer; forming an active base region in the substrate; etching an emitter opening in the nitride layer; etching the silicon dioxide layer exposed by the emitter opening; forming a polysilicon layer on the nitride layer and in the emitter opening; doping the polysilicon layer; annealing the substrate to form an emitter region in the active base region below the portion of the polysilicon layer which is in the emitter opening; forming a silicide layer on the polysilicon layer; etching the silicide layer, the polysilicon layer, and the nitride layer to leave a portion of the silicide layer, the polysilicon layer, and the nitride layer surrounding the emitter opening; and forming an extrinsic base region in the active base region, wherein the extrinsic base region is defined by the polysilicon layer and the nitride layer.

Claim 2

A method of fabricating a bipolar transistor that is compatible with a BiCMOS process, comprising the steps of: providing a semiconductor substrate having a buried layer which serves as a collector; forming a silicon dioxide layer on the substrate; forming a nitride layer on the silicon dioxide layer; forming an active base region in the substrate; etching an emitter opening in the nitride layer; etching the silicon dioxide layer exposed by the emitter opening; forming a polysilicon layer on the nitride layer and in the emitter opening; doping the polysilicon layer; annealing the substrate to form an emitter region in the active base region below the portion of the polysilicon layer which is in the emitter opening; forming a silicide layer on the polysilicon layer; etching the silicide layer, the polysilicon layer, and the nitride layer to leave a portion of the silicide layer, the polysilicon layer, and the nitride layer surrounding the emitter opening; and forming an extrinsic base region in the active base region, wherein the extrinsic base region is defined by the polysilicon layer and the nitride layer.

Claim 5

A method of fabricating a bipolar transistor that is compatible with a BiCMOS process, comprising the steps of: providing a semiconductor substrate having a buried layer which serves as a collector; forming a silicon dioxide layer on the substrate; forming a nitride layer on the silicon dioxide layer; forming an active base region in the substrate; etching an emitter opening in the nitride layer; etching the silicon dioxide layer exposed by the emitter opening; forming a polysilicon layer on the nitride layer and in the emitter opening; doping the polysilicon layer; etching the polysilicon layer to leave a portion in the emitter opening and partially overlapping the nitride layer; annealing the substrate to form an emitter region in the active base region below the portion of the polysilicon layer which is in the emitter opening; forming a silicide layer on the polysilicon layer; etching the nitride layer not covered by the polysilicon layer; and forming an extrinsic base region in the active base region, wherein the extrinsic base region is defined by the polysilicon layer and the nitride layer.

Claim 6

A method of fabricating a bipolar transistor that is compatible with a BiCMOS process, comprising the steps of: providing a semiconductor substrate having a buried layer which serves as a collector; forming a silicon dioxide layer on the substrate; forming a nitride layer on the silicon dioxide layer; forming an active base region in the substrate; etching an emitter opening in the nitride layer; etching the silicon dioxide layer exposed by the emitter opening; forming a polysilicon layer on the nitride layer and in the emitter opening; doping the polysilicon layer; etching the polysilicon layer to leave a portion in the emitter opening and partially overlapping the nitride layer; annealing the substrate to form an emitter region in the active base region below the portion of the polysilicon layer which is in the emitter opening; forming a silicide layer on the polysilicon layer; etching the nitride layer not covered by the polysilicon layer; and forming an extrinsic base region in the active base region, wherein the extrinsic base region is defined by the polysilicon layer and the nitride layer.

Claim 7

A method of fabricating a bipolar transistor that is compatible with a BiCMOS process, comprising the steps of: providing a semiconductor substrate having a buried layer which serves as a collector; forming a thin silicon dioxide layer on the substrate; forming a nitride layer on the silicon dioxide layer; forming an active base region in the substrate; dry etching an emitter opening in the nitride layer; wet etching the silicon dioxide layer exposed by the emitter opening; forming a polysilicon layer on the nitride layer and in the emitter opening; doping the polysilicon layer; annealing the substrate to form an emitter region in the active base region below the portion of the polysilicon layer which is in the emitter opening; forming a silicide layer on the polysilicon layer; etching the silicide layer, the polysilicon layer, and the nitride layer to leave a portion of the silicide layer, the polysilicon layer, and the nitride layer surrounding the emitter opening; and forming an extrinsic base region in the active base region, wherein the extrinsic base region is defined by the polysilicon layer and the nitride layer.

Claim 8

A method of fabricating a bipolar transistor that is compatible with a BiCMOS process, comprising the steps of: providing a semiconductor substrate having a buried layer which serves as a collector; forming a thin silicon dioxide layer on the substrate; forming a nitride layer on the silicon dioxide layer; forming an active base region in the substrate; dry etching an emitter opening in the nitride layer; wet etching the silicon dioxide layer exposed by the emitter opening; forming a polysilicon layer on the nitride layer and in the emitter opening; doping the polysilicon layer; annealing the substrate to form an emitter region in the active base region below the portion of the polysilicon layer which is in the emitter opening; forming a silicide layer on the polysilicon layer; etching the silicide layer, the polysilicon layer, and the nitride layer to leave a portion of the silicide layer, the polysilicon layer, and the nitride layer surrounding the emitter opening; and forming an extrinsic base region in the active base region, wherein the extrinsic base region is defined by the polysilicon layer and the nitride layer.