Abstract A method and structure for implementing dynamic burn-in of semi-conductor chips in TAB processing is provided. The semi-conductor chips are mounted on a wire pattern formed on the obverse side of an insulating tape in a conventional way. The insulating tape has a plurality of openings extending therethrough, one opening between each adjacent location of a chip. Wires from the wiring pattern at each chip location pass over the openings on the obverse side of the tape. A second insulating tape is provided which has a series of parallel conductors formed on one surface thereof. The spacing of the conductors corresponds to the spacing of the wires over the openings. The second tape is applied to the reverse surface of the first tape with the conductors on the second tape in registration with the wires over the openings in the first tape and the wires are electrically bonded to the conductors. Thus, various voltage and signal levels can be supplied for all of the chips simultaneously during dynamic burn-in.
A method for forming a structure for implementing dynamic burn-in of semi-conductor chips wherein said chips are mounted serially on the circuit wiring formed on the obverse surface of an insulating tape, which method comprises; forming openings in said insulating tape extending through said tape between each chip location; forming a plurality of the circuit wires from each location to extend over said openings on the obverse side of the insulating tape; and forming a plurality of parallel extending conductors on the reverse side of said tape; said parallel conductors being formed to extend over said openings in registration with the lines on said obverse side of the tape; and bonding the conductors to the wires in the openings; whereby to provide electrical contacts for ground signal and power planes to each of said chips.
Claim 2
Independent Claim
135 words
A method for forming a structure for implementing dynamic burn-in of semi-conductor chips wherein said chips are mounted serially on the circuit wiring formed on the obverse surface of an insulating tape, which method comprises; forming openings in said insulating tape extending through said tape between each chip location; forming a plurality of the circuit wires from each location to extend over said openings on the obverse side of the insulating tape; and forming a plurality of parallel extending conductors on the reverse side of said tape; said parallel conductors being formed to extend over said openings in registration with the lines on said obverse side of the tape; and bonding the conductors to the wires in the openings; whereby to provide electrical contacts for ground signal and power planes to each of said chips.
Claim 3
Dependent Claim
56 words
The invention as defined in claim 1 wherein said conductors are applied to the reverse surface of said insulating tape by forming said conductors on a second insulating tape; and maintaining the second insulating tape against the reverse surface of said first insulating tape with the conductors in registration with the wires extending over the openings.