Thin film transistor array and method of manufacturing the same

Claim 1

A thin film transistor array comprising: a transparent insulating substrate; a gate electrode disposed on said substrate and having a predetermined pattern; a gate insulating layer disposed on said substrate and covering said gate electrode; a semiconductor layer disposed on said gate insulating layer; a protective insulating layer disposed on a portion of said semiconductor layer and having a pattern that is the same as that of said gate electrode, the protective insulating layer disposed on said semiconductor layer overlying the gate electrode disposed on the substrate with said patterns thereof aligned; an impurity-doped semiconductor layer part of which is disposed on said semiconductor layer and part of which is disposed on said protective insulating layer, the part of said impurity-doped semiconductor layer disposed on said semiconductor layer being isolated from the part of said impurity-doped semiconductor layer disposed on said protective insulating layer; a metal layer disposed on said impurity-doped semiconductor layer; and source and drain electrodes disposed on said metal layer beside, but not extending into an area directly above a thin film transistor channel portion of the transistor array.