Integrated circuit with high power, vertical output transistor capability

Claim 2

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type and a given resistivity on said substrate, forming a p-n junction therewith and having an upper surface, a source region of the first conductivity type extending from the upper surface in to said epitaxial layer and being separated therefrom by a p-n junction, a vertical drain region of the first conductivity type spaced from said source region, having a portion with a higher dopant concentration than said epitaxial layer, extending from the upper surface through said epitaxial layer to said substrate and forming p-n junction with said epitaxial layer, an insulating layer on the upper surface extending between said source region and said vertical drain region, a conductive gate electrode on said insulating layer extending between said source region and said vertical drain region, a conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate and, through said substrate, to said vertical drain region, said source region being separated from said vertical drain region by a region of the second conductivity type extending from the upper surface into said epitaxial layer a greater extent than said source region and having a portion between said source region and said vertical drain region, said source region being contained at least in part within said region of the second conductivity type and having a higher dopant concentration than a remainder of said epitaxial layer.

Claim 3

The power transistor device of claim 1 in which said source region is contained within said region of the second conductivity type and forms a p-n junction therewith.

Claim 4

The power transistor device of claim 1 in which said source region is partly within said region of the second conductivity type and extends partly from said region of the second conductivity type laterally away from said vertical drain region into said epitaxial layer and forms a p-n junction with both said region of the second conductivity type and said epitaxial layer.

Claim 5

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type on said substrate, forming a p-n junction therewith and having an upper surface, a source region of the first conductivity type extending from the upper surface into said epitaxial layer and being separated therefrom by a p-n junction, a drain region of the first conductivity type spaced from said source region, extending from the upper surface through said epitaxial layer to said substrate and forming a p-n junction with said epitaxial layer, an insulating layer on the upper surface extending between said source region and said drain region, a conductive electrode on said insulating layer extending between said source region and said drain region, a conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate, said source region being separated from said drain region by a region of the second conductivity type extending from the upper surface into said epitaxial layer and having a higher dopant concentration than a remainder of said epitaxial layer, said source region being partly within said region of the second conductivity type and extending partly from said region of the second conductivity type into said epitaxial layer and forms a p-n junction with both said region of the second conductivity type and said epitaxial layer, said region of the second conductivity type being located in part in said epitaxial layer and in part in a region of the first conductivity type extending through the epitaxial layer between the upper surface and said substrate and surrounding said drain region.

Claim 6

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type on said substrate, forming a p-n junction therewith and having an upper surface, a source region of the first conductivity type extending from the upper surface into said epitaxial layer and being separated therefrom by a p-n junction, a drain region of the first conductivity type spaced from said source region, extending from the upper surface through said epitaxial layer to said substrate and forming a p-n junction with said epitaxial layer, an insulating layer on the upper surface extending between said source region and said drain region, a conductive electrode on said insulating layer extending between said source region and said drain region, a conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate, said source region being separated from said drain region by a region of the second conductivity type extending from the upper surface into said epitaxial layer and having a higher dopant concentration than a remainder of said epitaxial layer, said source region being partly within said region of the second conductivity type and extending partly from said region of the second conductivity type into said epitaxial layer and forms a p-n junction with both said region of the second conductivity type and said epitaxial layer, said region of the second conductivity type being located in part in said epitaxial layer and in part in a region of the first conductivity type extending through the epitaxial layer between the upper surface and said substrate and surrounding said drain region.

Claim 7

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type on said substrate, forming a p-n junction therewith and having an upper surface, a source region of the first conductivity type extending from the upper surface into said epitaxial layer and being separated therefrom by a p-n junction, a drain region of the first conductivity type spaced from said source region, extending from the upper surface through said epitaxial layer to said substrate and forming a p-n junction with said epitaxial layer, an insulating layer on the upper surface extending between said source region and said drain region, a conductive gate electrode on said insulating layer extending between said source region and said drain region, a conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate, said source region being separated from said drain region by a region of the second conductivity type extending from the upper surface into said epitaxial layer and having a higher dopant concentration than a remainder of said epitaxial layer, said drain region comprising a first region of the first conductivity type intersecting said region of the second conductivity type and a second region of the first conductivity type having a higher conductivity than said first region of the first conductivity type and laterally surrounded by said first region.

Claim 8

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type on said substrate, forming a p-n junction therewith and having an upper surface, a source region of the first conductivity type extending from the upper surface into said epitaxial layer and being separated therefrom by a p-n junction, a drain region of the first conductivity type spaced from said source region, extending from the upper surface through said epitaxial layer to said substrate and forming a p-n junction with said epitaxial layer, an insulating layer on the upper surface extending between said source region and said drain region, a conductive gate electrode on said insulating layer extending between said source region and said drain region, a conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate, said source region being separated from said drain region by a region of the second conductivity type extending from the upper surface into said epitaxial layer and having a higher dopant concentration than a remainder of said epitaxial layer, said drain region comprising a first region of the first conductivity type intersecting said region of the second conductivity type and a second region of the first conductivity type having a higher conductivity than said first region of the first conductivity type and laterally surrounded by said first region.

Claim 9

The power transistor device of claim 1 in which said region of the second conductivity type has a first portion surrounding a second portion, said first portion having a higher conductivity than said second portion.

Claim 10

The power transistor device of claim 6 in which said first portion extends from the upper surface a greater extent than said second portion.

Claim 11

The power transistor device of claim 7 in which said region of the second conductivity type is contained in a region of the first conductivity type extending through the epitaxial layer between the upper surface and said substrate and surrounding said vertical drain region.

Claim 12

The power transistor device of claim 5 in which said second portion extends from the upper surface a greater extent than said first portion.

Claim 13

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type on said substrate, forming a p-n junction therewith and having an upper surface, a source region of the first conductivity type extending from the upper surface into said epitaxial layer and being separated therefrom by a p-n junction, a drain region of the first conductivity type spaced from said source region, extending from the upper surface through said epitaxial layer to said substrate and forming a p-n junction with said epitaxial layer, an insulating layer on the upper surface extending between said source region and said drain region, a conductive gate electrode on said insulating layer extending between said source region and said drain region, a conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate, said source region being separated from said drain region by a region of the second conductivity type extending from the upper surface into said epitaxial layer and having a higher dopant concentration than a remainder of said epitaxial layer, said region of the second conductivity type having a first portion surrounding a second portion, said first portion having a higher conductivity than said second portion, said first portion extending from the upper surface a greater extent than said second portion, said region of the second conductivity type being contained in part in said epitaxial layer and in part in a region of the first conductivity type extending through the epitaxial layer between the upper surface and said substrate and surrounding said drain region.

Claim 14

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type on said substrate, forming a p-n junction therewith and having an upper surface, a source region of the first conductivity type extending from the upper surface into said epitaxial layer and being separated therefrom by a p-n junction, a drain region of the first conductivity type spaced from said source region, extending from the upper surface through said epitaxial layer to said substrate and forming a p-n junction with said epitaxial layer, an insulating layer on the upper surface extending between said source region and said drain region, a conductive gate electrode on said insulating layer extending between said source region and said drain region, a conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate, said source region being separated from said drain region by a region of the second conductivity type extending from the upper surface into said epitaxial layer and having a higher dopant concentration than a remainder of said epitaxial layer, said region of the second conductivity type having a first portion surrounding a second portion, said first portion having a higher conductivity than said second portion, said first portion extending from the upper surface a greater extent than said second portion, said region of the second conductivity type being contained in part in said epitaxial layer and in part in a region of the first conductivity type extending through the epitaxial layer between the upper surface and said substrate and surrounding said drain region.

Claim 15

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type on said substrate, forming a p-n junction therewith and having an upper surface, a source region of the first conductivity type extending from the upper surface into said epitaxial layer and being separated therefrom by a p-n junction, a drain region of the first conductivity type spaced from said source region, extending from the upper surface through said epitaxial layer to said substrate and forming a p-n junction with said epitaxial layer, an insulating layer on the upper surface extending between said source region and said drain region, a conductive gate electrode on said insulating layer extending between said source region and said drain region, a conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate, said source region connecting to said drain region at the upper surface of said epitaxial layer by means of first conductivity type material, and said source region being in part contained in second conductivity type material.

Claim 16

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type on said substrate, forming a p-n junction therewith and having an upper surface, a source region of the first conductivity type extending from the upper surface into said epitaxial layer and being separated therefrom by a p-n junction, a drain region of the first conductivity type spaced from said source region, extending from the upper surface through said epitaxial layer to said substrate and forming a p-n junction with said epitaxial layer, an insulating layer on the upper surface extending between said source region and said drain region, a conductive gate electrode on said insulating layer extending between said source region and said drain region, a conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate, said source region connecting to said drain region at the upper surface of said epitaxial layer by means of first conductivity type material, and said source region being in part contained in second conductivity type material.

Claim 17

The power transistor device of claim 11 in which said source region is in part contained in a region of the second conductivity type material having a higher conductivity than said epitaxial layer.

Claim 18

The power transistor device of claim 12 in which said region of the second conductivity type is contained in part in said epitaxial layer and in part in a region of the first conductivity type extending through the epitaxial layer between the upper surface and said substrate and surrounding said drain region.

Claim 19

An integrated circuit comprising the power transistor of claim 1 self-isolated by at least said vertical drain and said substrate forming reversed biased p-n junctions with said layer of the second conductivity type from at least one additional transistor formed on a common substrate.

Claim 20

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type and a given resistivity on said substrate, forming a p-n junction therewith and having an upper surface, a source region of the first conductivity type extending from the upper surface into said epitaxial layer and being separated therefrom by a p-n junction, a vertical drain region of the first conductivity type spaced from said source region, having a portion with a higher dopant concentration than said epitaxial layer, extending from the upper surface through said epitaxial layer to said substrate and forming a p-n junction with said epitaxial layer, a channel region of said first conductivity type extending into said epitaxial layer form said upper surface between and connecting said source region and said vertical drain region, an insulating layer on the upper surface over said channel region and extending between said source region and said vertical drain region, a conductive gate electrode over said channel region on said insulating layer extending between said source region and said vertical drain region, a conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate and, through said substrate, to said vertical drain, said source region being separated from a remainder of said epitaxial layer by a region of the second conductivity type extending from the upper surface into said epitaxial layer and having a higher dopant concentration than a remainder of said epitaxial layer, said source region being located within said region of the second conductivity type and forming a p-n junction therewith, other than at said channel region.

Claim 21

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type and a given resistivity on said substrate, forming a p-n junction therewith and having an upper surface, a source region of the first conductivity type extending from the upper surface into said epitaxial layer and being separated therefrom by a p-n junction, a vertical drain region of the first conductivity type spaced from said source region, having a portion with a higher dopant concentration than said epitaxial layer, extending from the upper surface through said epitaxial layer to said substrate and forming a p-n junction with said epitaxial layer, a channel region of said first conductivity type extending into said epitaxial layer form said upper surface between and connecting said source region and said vertical drain region, an insulating layer on the upper surface over said channel region and extending between said source region and said vertical drain region, a conductive gate electrode over said channel region on said insulating layer extending between said source region and said vertical drain region, a conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate and, through said substrate, to said vertical drain, said source region being separated from a remainder of said epitaxial layer by a region of the second conductivity type extending from the upper surface into said epitaxial layer and having a higher dopant concentration than a remainder of said epitaxial layer, said source region being located within said region of the second conductivity type and forming a p-n junction therewith, other than at said channel region.

Claim 22

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type on said substrate, forming a p-n junction therewith and having an upper surface, a source region of the first conductivity type extending from the upper surface into said epitaxial layer and being separated therefrom by a p-n junction, a drain region of the first conductivity type spaced from said source region, extending from the upper surface through said epitaxial layer to said substrate and forming a p-n junction with said epitaxial layer, a channel region of said first conductivity type extending into said epitaxial layer from said upper surface between and connecting said source region and said drain region, an insulating layer on the upper surface over said channel region and extending between said source region and said drain region, a conductive gate electrode over said channel region on said insulating layer extending between said source region and said drain region, a conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate, said source region being separated from a remainder of said epitaxial layer by a region of the second conductivity type extending from the upper surface into said epitaxial layer and having a higher dopant concentration than a remainder of said epitaxial layer, said source region being located within said region of the second conductivity type and forming a p-n junction therewith, said drain region comprising a first region of the first conductivity type intersecting said region of the second conductivity type and a second region of the first conductivity type having a higher conductivity than said first region of the first conductivity type and laterally surrounded by said first region.

Claim 23

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type on said substrate, forming a p-n junction therewith and having an upper surface, a source region of the first conductivity type extending from the upper surface into said epitaxial layer and being separated therefrom by a p-n junction, a drain region of the first conductivity type spaced from said source region, extending from the upper surface through said epitaxial layer to said substrate and forming a p-n junction with said epitaxial layer, a channel region of said first conductivity type extending into said epitaxial layer from said upper surface between and connecting said source region and said drain region, an insulating layer on the upper surface over said channel region and extending between said source region and said drain region, a conductive gate electrode over said channel region on said insulating layer extending between said source region and said drain region, a conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate, said source region being separated from a remainder of said epitaxial layer by a region of the second conductivity type extending from the upper surface into said epitaxial layer and having a higher dopant concentration than a remainder of said epitaxial layer, said source region being located within said region of the second conductivity type and forming a p-n junction therewith, said drain region comprising a first region of the first conductivity type intersecting said region of the second conductivity type and a second region of the first conductivity type having a higher conductivity than said first region of the first conductivity type and laterally surrounded by said first region.

Claim 24

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type and a given resistivity on said substrate, forming a p-n junction therewith and having an upper surface, a vertical region of the first conductivity type having a portion with a higher dopant concentration than said epitaxial layer, extending through the epitaxial layer between the upper surface and said substrate, a region of the second conductivity type extending from the upper surface into said vertical region of the first conductivity type and having a higher dopant concentration than said epitaxial layer, a source region of the first conductivity type extending from the upper surface into said region of the second conductivity type and being separated therefrom by a p-n junction, an insulating layer on the upper surface extending between said source region and said vertical region of the first conductivity type, a conductive gate electrode on said insulating layer extending between said source region and said vertical region of the first conductivity type, a conductive electrode electrically connected to said source region, a conductive electrode electrically connected to said substrate and, through said substrate, to said vertical region of the first conductivity type, and a vertical drain region of the first conductivity type spaced from conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate and, through said substrate, to said vertical drain, said source region being separated from a remainder of said epitaxial layer by a region of the second conductivity type extending from the upper surface into said epitaxial layer and having a higher dopant concentration than a remainder of said epitaxial layer, said source region being located within said region of the second conductivity type and forming a p-n junction therewith, other than at said channel region.

Claim 25

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type and a given resistivity on said substrate, forming a p-n junction therewith and having an upper surface, a vertical region of the first conductivity type having a portion with a higher dopant concentration than said epitaxial layer, extending through the epitaxial layer between the upper surface and said substrate, a region of the second conductivity type extending from the upper surface into said vertical region of the first conductivity type and having a higher dopant concentration than said epitaxial layer, a source region of the first conductivity type extending from the upper surface into said region of the second conductivity type and being separated therefrom by a p-n junction, an insulating layer on the upper surface extending between said source region and said vertical region of the first conductivity type, a conductive gate electrode on said insulating layer extending between said source region and said vertical region of the first conductivity type, a conductive electrode electrically connected to said source region, a conductive electrode electrically connected to said substrate and, through said substrate, to said vertical region of the first conductivity type, and a vertical drain region of the first conductivity type spaced from conductive electrode electrically connected to said source region, and a conductive electrode electrically connected to said substrate and, through said substrate, to said vertical drain, said source region being separated from a remainder of said epitaxial layer by a region of the second conductivity type extending from the upper surface into said epitaxial layer and having a higher dopant concentration than a remainder of said epitaxial layer, said source region being located within said region of the second conductivity type and forming a p-n junction therewith, other than at said channel region.

Claim 26

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type and a given resistivity on said substrate, forming a p-n junction therewith and having an upper surface, a vertical region of the first conductivity type having a portion with a higher dopant concentration than said epitaxial layer, extending through the epitaxial layer between the upper surface and said substrate, a region of the second conductivity type extending from the upper surface into said vertical region of the first conductivity type and having a higher dopant concentration than said epitaxial layer, a source region of the first conductivity type extending from the upper surface into said region of the second conductivity type and being separated therefrom by a p-n junction, an insulating layer on the upper surface extending between said source region and said vertical region of the first conductivity type, a conductive gate electrode on said insulating layer extending between said source region and said vertical region of the first conductivity type, a conductive electrode electrically connected to said source region, a conductive electrode electrically connected to said substrate and, through said substrate, to said vertical region of the first conductivity type, said region of the second conductivity type and said source region being annular in shape and said conductive gate electrode extending between opposing parts of said annular region of the second conductive type and said annular source region.

Claim 27

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type and a given resistivity on said substrate, forming a p-n junction therewith and having an upper surface, a vertical region of the first conductivity type having a portion with a higher dopant concentration than said epitaxial layer, extending through the epitaxial layer between the upper surface and said substrate, a region of the second conductivity type extending from the upper surface into said vertical region of the first conductivity type and having a higher dopant concentration than said epitaxial layer, a source region of the first conductivity type extending from the upper surface into said region of the second conductivity type and being separated therefrom by a p-n junction, an insulating layer on the upper surface extending between said source region and said vertical region of the first conductivity type, a conductive gate electrode on said insulating layer extending between said source region and said vertical region of the first conductivity type, a conductive electrode electrically connected to said source region, a conductive electrode electrically connected to said substrate and, through said substrate, to said vertical region of the first conductivity type, said region of the second conductivity type and said source region being annular in shape and said conductive gate electrode extending between opposing parts of said annular region of the second conductive type and said annular source region.

Claim 28

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type and a given resistivity on said substrate, forming a p-n junction therewith and having an upper surface, a vertical region of the first conductivity type having a portion with a higher dopant concentration than said epitaxial layer, extending through the epitaxial layer between the upper surface and said substrate, a region of the second conductivity type extending from the upper surface into said vertical region of the first conductivity type and having a higher dopant concentration than said epitaxial layer, a source region of the first conductivity type extending from the upper surface into said region of the second conductivity type and being separated therefrom by a p-n junction, an insulating layer on the upper surface extending between said source region and said vertical region of the first conductivity type, a conductive gate electrode on said insulating layer extending between said source region and said vertical region of the first conductivity type, a conductive electrode electrically connected to said source region, a conductive electrode electrically connected to said substrate and, through said substrate, to said vertical region of the first conductivity type, said region of the second conductivity type having a first portion surrounding a second portion, said first portion having a higher conductivity than said second portion.

Claim 29

A power transistor device, which comprises a substrate of a first conductivity type, an epitaxial layer of a second conductivity type and a given resistivity on said substrate, forming a p-n junction therewith and having an upper surface, a vertical region of the first conductivity type having a portion with a higher dopant concentration than said epitaxial layer, extending through the epitaxial layer between the upper surface and said substrate, a region of the second conductivity type extending from the upper surface into said vertical region of the first conductivity type and having a higher dopant concentration than said epitaxial layer, a source region of the first conductivity type extending from the upper surface into said region of the second conductivity type and being separated therefrom by a p-n junction, an insulating layer on the upper surface extending between said source region and said vertical region of the first conductivity type, a conductive gate electrode on said insulating layer extending between said source region and said vertical region of the first conductivity type, a conductive electrode electrically connected to said source region, a conductive electrode electrically connected to said substrate and, through said substrate, to said vertical region of the first conductivity type, said region of the second conductivity type having a first portion surrounding a second portion, said first portion having a higher conductivity than said second portion.

Claim 30

The power transistor device of claim 19 in which said first portion extends from the upper surface a greater extent than said second portion.