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US4933302A Expired / Lapsed US ⏱️ 0.0 years remaining

Formation of laser mirror facets and integration of optoelectronics

Assignee: International Business Machines Corp
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Filing: 1989-04-19
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Granted: 1990-06-12
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Expires: 2009-04-19
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Abstract

Abstract A planar process for fabricating an optoelectronic integrated circuit device is described. The process includes the in situ formation of laser diode mirror facets comprising the steps of providing a semi-insulating gallium arsenide substrate having thereon layers of n-doped gallium arsenide, n-doped aluminum gallium arsenide, and undoped gallium arsenide; patterning and etching the undoped gallium arsenide layer into a mandrel having substantially vertical walls; establishing insulator sidewalls on the vertical walls; removing the mandrel, thereby exposing the inner walls of the insulator sidewalls and leaving the insulator sidewalls self-standing; removing the aluminum gallium arsenide using the insulator sidewall as a mask; and forming a laser diode within the region between the insulator sidewalls and creating the mirror facets with the inner walls of the insulator sidewalls. Mirror facets formed in accordance with this process are substantially free of contaminants. The process is suitable for high level of monolithic integration, including the formation of other optical devices, such as waveguides, driver circuits, logic and other electronic circuits.

Inventors

  • 👤 Gregory Costrini
  • 👤 Chakrapani G. Jambotkar

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 23:38
CPC Classifications
H; H01; H01S; H01S5/00; H01S5/02; H01S5/026; G; G02; G02B; G02B6/00; G02B6/10; G02B6/12; G02B6/122; G02B6/124; H01S5/028; H01S5/0201; H01S5/0205; H01S5/0261; H01S5/20; H01S5/22; H01S5/227; H01S5/2272; Y; Y10; Y10S; Y10S148/00; Y10S148/026; Y10S148/095; Y10S148/106

Claims Analysis

Total Claims: 23
Claim 1
Independent Claim 138 words
A process for forming laser diode mirror facets comprising the steps of: providing a semi-insulating substrate having a first epitaxial layer of a first type conductivity overlying said substrate, a second epitaxial layer of said first conductance type overlying said first epitaxial layer and a third undoped epitaxial layer overlying said second epitaxial layer; patterning and etching said third undoped epitaxial layer into a mandrel having substantially vertical walls; establishing insulator sidewalls on said vertical walls; removing said mandrel, thereby exposing inner walls of said insulator sidewalls and leaving said insulator sidewalls self-standing; removing said second epitaxial layer using said insulator sidewalls as a mask; and forming a laser diode overlying said first epitaxial layer within the region between said insulator sidewalls, thereby creating said mirror facets at the interface of said laser diode and said insulator sidewalls.
Claim 2
Dependent Claim 138 words
A process for forming laser diode mirror facets comprising the steps of: providing a semi-insulating substrate having a first epitaxial layer of a first type conductivity overlying said substrate, a second epitaxial layer of said first conductance type overlying said first epitaxial layer and a third undoped epitaxial layer overlying said second epitaxial layer; patterning and etching said third undoped epitaxial layer into a mandrel having substantially vertical walls; establishing insulator sidewalls on said vertical walls; removing said mandrel, thereby exposing inner walls of said insulator sidewalls and leaving said insulator sidewalls self-standing; removing said second epitaxial layer using said insulator sidewalls as a mask; and forming a laser diode overlying said first epitaxial layer within the region between said insulator sidewalls, thereby creating said mirror facets at the interface of said laser diode and said insulator sidewalls.
Claim 3
Dependent Claim 21 words
A process for forming laser diode mirror facets as set forth in claim 1, wherein said first epitaxial layer is GaAs.
Claim 4
Dependent Claim 21 words
A process for forming laser diode mirror facets as set forth in claim 2, wherein said second epitaxial layer is AlGaAs.
Claim 5
Dependent Claim 22 words
A process for forming laser diode mirror facets as set forth in claim 3, wherein said third undoped epitaxial layer is GaAs.
Claim 6
Dependent Claim 40 words
A process for forming laser diode mirror facets as set forth in claim 1, wherein side insulator sidewalls are established by depositing a blanket silicon nitride layer covering said mandrel and etching said silicon nitride layer using reactive ion etching.
Claim 7
Dependent Claim 37 words
A process for forming laser diode mirror facets as set forth in claim 1, wherein said first epitaxial layer, second epitaxial layer, said third epitaxial layer and said laser diode are formed by metalorganic chemical vapor deposition.
Claim 8
Dependent Claim 140 words
A process for fabricating a heterostructure laser having mirror facets comprising the steps of: providing a semi-insulating substrate having a first epitaxial layer of a first type conductivity overlying said substrate, a second epitaxial layer of said first conductance type overlying said first epitaxial layer and a third undoped epitaxial layer overlying said second epitaxial layer; patterning and etching said third undoped epitaxial layer into a mandrel having substantially vertical walls; establishing insulator sidewalls on said vertical walls; removing said mandrel, thereby exposing inner walls of said insulator sidewalls and leaving said insulator sidewalls self-standing; removing said second epitaxial layer using said insulator sidewalls as a mask; and forming said heterostructural laser overlying said first epitaxial layer within the region between said insulator sidewalls, thereby creating said mirror facets at the interface of said heterostructure laser and said insulator side-walls.
Claim 9
Dependent Claim 140 words
A process for fabricating a heterostructure laser having mirror facets comprising the steps of: providing a semi-insulating substrate having a first epitaxial layer of a first type conductivity overlying said substrate, a second epitaxial layer of said first conductance type overlying said first epitaxial layer and a third undoped epitaxial layer overlying said second epitaxial layer; patterning and etching said third undoped epitaxial layer into a mandrel having substantially vertical walls; establishing insulator sidewalls on said vertical walls; removing said mandrel, thereby exposing inner walls of said insulator sidewalls and leaving said insulator sidewalls self-standing; removing said second epitaxial layer using said insulator sidewalls as a mask; and forming said heterostructural laser overlying said first epitaxial layer within the region between said insulator sidewalls, thereby creating said mirror facets at the interface of said heterostructure laser and said insulator side-walls.
Claim 10
Dependent Claim 20 words
A process for fabricating a heterostructure laser as set forth in claim 7, wherein said first epitaxial layer is GaAs.
Claim 11
Dependent Claim 20 words
A process for fabricating a heterostructure laser as set forth in claim 8, wherein said second epitaxial layer is AlGaAs.
Claim 12
Dependent Claim 21 words
A process for fabricating a heterostructure laser as set forth in claim 9, wherein said third undoped epitaxial layer is GaAs.
Claim 13
Dependent Claim 39 words
A process for fabricating a heterostructure laser as set forth in claim 7, wherein side insulator sidewalls are established by depositing a blanket silicon nitride layer covering said mandrel and etching said silicon nitride layer using reactive ion etching.
Claim 14
Dependent Claim 36 words
A process for fabricating a heterostructure laser as set forth in claim 7, wherein said first epitaxial layer, second epitaxial layer, said third epitaxial layer and said heterostructure laser are formed by metalorganic chemical vapor deposition.
Claim 15
Dependent Claim 166 words
A planar process for fabricating an optoelectronic integrated circuit device comprising the steps of: providing a semi-insulating substrate having a first epitaxial layer of a first type conductivity overlying said substrate, a second epitaxial layer of said first conductance type overlying said first epitaxial layer and a third undoped epitaxial layer overlying said second epitaxial layer; patterning and etching said third undoped epitaxial layer into a mandrel having substantially vertical walls; establishing insulator sidewalls on said vertical walls; removing said mandrel, thereby exposing inner walls of said insulator sidewalls and leaving said insulator sidewalls self-standing; removing said second epitaxial layer using said insulator sidewalls as a mask; forming a heterostructural laser overlying said first epitaxial layer within the region between said insulator sidewalls, thereby creating said mirror facets at the interface of said heterostructural laser and said insulator sidewalls; and forming other optoelectronic devices along side said heterostructure laser, said other optoelectronic devices having upper surfaces substantially coplanar with the upper surface of said heterostructure laser.
Claim 16
Dependent Claim 166 words
A planar process for fabricating an optoelectronic integrated circuit device comprising the steps of: providing a semi-insulating substrate having a first epitaxial layer of a first type conductivity overlying said substrate, a second epitaxial layer of said first conductance type overlying said first epitaxial layer and a third undoped epitaxial layer overlying said second epitaxial layer; patterning and etching said third undoped epitaxial layer into a mandrel having substantially vertical walls; establishing insulator sidewalls on said vertical walls; removing said mandrel, thereby exposing inner walls of said insulator sidewalls and leaving said insulator sidewalls self-standing; removing said second epitaxial layer using said insulator sidewalls as a mask; forming a heterostructural laser overlying said first epitaxial layer within the region between said insulator sidewalls, thereby creating said mirror facets at the interface of said heterostructural laser and said insulator sidewalls; and forming other optoelectronic devices along side said heterostructure laser, said other optoelectronic devices having upper surfaces substantially coplanar with the upper surface of said heterostructure laser.
Claim 17
Dependent Claim 22 words
A process for fabricating an optoelectronic integrated circuit device as set forth in claim 13, wherein said first epitaxial layer is GaAs.
Claim 18
Dependent Claim 22 words
A process for fabricating an optoelectronic integrated circuit device as set forth in claim 14, wherein said second epitaxial layer is AlGaAs.
Claim 19
Dependent Claim 23 words
A process for fabricating an optoelectronic integrated circuit device as set forth in claim 15, wherein said third undoped epitaxial layer is GaAs.
Claim 20
Dependent Claim 41 words
A process for fabricating an optoelectronic integrated circuit device as set forth in claim 13, wherein side insulator sidewalls are established by depositing a blanket silicon nitride layer covering said mandrel and etching said silicon nitride layer using reactive ion etching.
Claim 21
Dependent Claim 38 words
A process for fabricating an optoelectronic integrated circuit device as set forth in claim 13, wherein said first epitaxial layer, second epitaxial layer, said third epitaxial layer and said heterostructure laser are formed by metalorganic chemical vapor deposition.
Claim 22
Dependent Claim 29 words
A process for fabricating an optoelectronic integrated circuit device as set forth in claim 13, wherein said forming of other optoelectronic devices includes the formation of an optical waveguide.
Claim 23
Dependent Claim 29 words
A process for fabricating an optoelectronic integrated circuit device as set forth in claim 13, wherein said forming of other optoelectronic devices includes the formation of heterostructure bipolar transistors.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-06-11 1993-12-11 1994-06-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-06-11 1997-12-11 1998-06-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-06-11 2001-12-11 2002-06-12 $7700.00 Window Closed / Lapsed

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