US4931405A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for manufacturing a semiconductor device and suppressing the generation of bulk microdefects near the substrate surface layer
Assignee: Toshiba Corp
•
Filing: 1989-02-06
•
Granted: 1990-06-05
•
Expires: 2009-02-06
Abstract
Abstract A method for manufacturing a semiconductor device is disclosed which selectively forms in a one-conductivity type semiconductor device a deep impurity-diffused area at over 1100° C. in an H 2 gas atmosphere containing N 2 , Ar, Ne, He and a combination thereof.
Inventors
- 👤 Hiroyuki Kamijo
- 👤 Yuuichi Mikata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 05:22
CPC Classifications
C; C07; C07D; C07D493/00; C07D493/12; C07D493/20; C09; C09B; C09B29/00; C09B29/34; C09B29/36; C09B29/3604; C09B29/3617; C09B29/3621; C09B29/3626; C09B29/363; G; G03; G03F; G03F7/00; G03F7/004; G03F7/09; G03F7/095; H; H10; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1404; H10P32/1406; H10P32/17; H10P32/171; H10P36/00; H10P36/20; Y; Y10; Y10S; Y10S438/00; Y10S438/909
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
211 words
A method for manufacturing a semiconductor device having in a semiconductor substrate of one conductivity type a deep island-like diffusion layer of the opposite conductivity type, said method suppressing the generation of bulk microdefects near the substrate surface layer and comprising the steps of: selectively forming in the semiconductor substrate of one conductivity type a deep island-like impurity diffusion layer of the opposite conductivity type, including the substeps of, forming an oxide film on the semiconductor substrate; forming a resist pattern on the oxide film; implanting an impurity ion into the substrate at a predetermined location; forming a well by heating the substrate at a temperature greater than 1100° C. in a gas comprising H 2 and one of N 2 , Ar, Ne, He or a mixture thereof; and removing the oxide film; forming a field oxide film, serving as an element isolation layer, next to the impurity diffusion layer; forming a first gate, serving as a capacitor, on the semiconductor substrate; forming a second gate, serving as a switching transistor, on the semiconductor substrate and connected in parallel with the first gate; forming an insulation layer for insulating the first gate from the second gate; and forming a passivation film for protecting an element uppermost on the insulation layer.
Claim 2
Independent Claim
211 words
A method for manufacturing a semiconductor device having in a semiconductor substrate of one conductivity type a deep island-like diffusion layer of the opposite conductivity type, said method suppressing the generation of bulk microdefects near the substrate surface layer and comprising the steps of: selectively forming in the semiconductor substrate of one conductivity type a deep island-like impurity diffusion layer of the opposite conductivity type, including the substeps of, forming an oxide film on the semiconductor substrate; forming a resist pattern on the oxide film; implanting an impurity ion into the substrate at a predetermined location; forming a well by heating the substrate at a temperature greater than 1100° C. in a gas comprising H 2 and one of N 2 , Ar, Ne, He or a mixture thereof; and removing the oxide film; forming a field oxide film, serving as an element isolation layer, next to the impurity diffusion layer; forming a first gate, serving as a capacitor, on the semiconductor substrate; forming a second gate, serving as a switching transistor, on the semiconductor substrate and connected in parallel with the first gate; forming an insulation layer for insulating the first gate from the second gate; and forming a passivation film for protecting an element uppermost on the insulation layer.
Claim 3
Dependent Claim
34 words
The method according to claim 1, wherein a volume ratio of said H 2 gas to said one of N 2 , Ar, Ne, He and a mixture thereof is greater than approximately 1%.
Claim 4
Dependent Claim
62 words
The method according to claim 1, in which said semiconductor substrate is placed in an H 2 concentration atmosphere of 1.4×10 12 to 3.0×10 18 atoms/cm 3 to form said well, said H 2 concentration being found from an equation (α×4.81×10.sup.17) atoms/cm.sup.3 where α: an absorption coefficient (cm -1 ) of an infrared radiation whose wave number is 1106 cm -1 .
Claim 5
Dependent Claim
61 words
The method according to claim 2, in which said semiconductor substrate is placed in an oxygen concentration atmosphere of 1.44×10 18 to 3.0×10 18 atoms/cm 3 to form said oxide film, the oxygen concentration being found from an equation (α×4.81×10.sup.17) atoms/cm.sup.3 where α: an absorption coefficient (cm -1 ) of an infrared radiation whose wave number is 1106 cm -1 .
References Cited (Backward Citations)
JPS5839014A
Cited
JPS5956575A
Cited
JPS59108366A
Cited
EP0131717A2
Cited
JPS6039824A
Cited
US4762802A
Cited
JPS62210627A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-06-04 | 1993-12-04 | 1994-06-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-06-04 | 1997-12-04 | 1998-06-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-06-04 | 2001-12-04 | 2002-06-05 | $7700.00 | Window Closed / Lapsed |