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US4927780A Expired / Lapsed US ⏱️ 0.0 years remaining

Encapsulation method for localized oxidation of silicon

Assignee: Motorola Solutions Inc
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Filing: 1989-10-02
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Granted: 1990-05-22
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Expires: 2009-10-02
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Abstract

Abstract An improved LOCOS isolation process is disclosed wherein an oxidizable layer is conformably dieposited to overlie a silicon nitride oxidation mask. In accordance with one embodiment of the invention, a composite layer comprising a buffer layer and an oxidation resistant material is patterned to form an oxidation mask on a silicon substrate. A layer of an oxidizable material is conformably deposited to overlie the oxidation mask. During the oxidation process used to form electrical isolation structures in the substrate, a substantial reduction in lateral oxidation encroachment is realized.

Inventors

  • 👤 Scott S. Roth
  • 👤 Bich-Yen Nguyen
  • 👤 Philip J. Tobin
  • 👤 Wayne Ray
  • 👤 E. Petyr Wachholz
  • 👤 Glenn Wissen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 05:40
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/61; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0121; H10W10/0124; H10W10/10; H10W10/13

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 149 words
A method for forming an integrated circuit device on a semiconductor substrate comprising the steps of: forming a buffer layer to overlie said substrate; depositing a layer of oxidation resistant material onto said buffer layer to form a composite layer comprising said buffer layer and said layer of oxidation resistant material over said buffer layer; etching selected portions of said composite layer to expose portions of said substrate and to leave masking portions of said composite layer overlying said substrate; etching said buffer layer to form a recess under an edge portion of said oxidation resistant layer of said masking portions; depositing a conformal layer of oxidizable material to overlie said masking portions of said composite layer substantially filling said recess with said conformal layer; and oxidizing said conformal layer and said exposed portions of said substrate to form electrical isolation regions in said exposed portions of said substrate.
Claim 2
Independent Claim 149 words
A method for forming an integrated circuit device on a semiconductor substrate comprising the steps of: forming a buffer layer to overlie said substrate; depositing a layer of oxidation resistant material onto said buffer layer to form a composite layer comprising said buffer layer and said layer of oxidation resistant material over said buffer layer; etching selected portions of said composite layer to expose portions of said substrate and to leave masking portions of said composite layer overlying said substrate; etching said buffer layer to form a recess under an edge portion of said oxidation resistant layer of said masking portions; depositing a conformal layer of oxidizable material to overlie said masking portions of said composite layer substantially filling said recess with said conformal layer; and oxidizing said conformal layer and said exposed portions of said substrate to form electrical isolation regions in said exposed portions of said substrate.
Claim 3
Dependent Claim 38 words
The method of claim 1 further comprising the step of anisotropically etching said conformal layer to form a portion of said conformal layer bounding said masking portions and substantially planar with the top surface of said masking portions.
Claim 4
Dependent Claim 33 words
The method of claim 2 further comprising the steps of: etching said exposed portions of said substrate to form depressions therein; and removing said masking portions subsequent to oxidizing of said conformal layer.
Claim 5
Dependent Claim 18 words
The method of claim 1 further comprising the step of removing said oxidized layer and said masking portions.
Claim 6
Dependent Claim 21 words
The method of claim 1 wherein said oxidization resistant material is selected from the group consisting of silicon nitride and oxynitride.
Claim 7
Dependent Claim 22 words
The method of claim 1 wherein said substrate comprises silicon and said step of forming a buffer layer comprises oxidation of silicon.
Claim 8
Dependent Claim 22 words
The method of claim 1 wherein said step of forming a buffer layer comprises chemical vapor depositing a layer of silicon dioxide.
Claim 9
Dependent Claim 20 words
The method of claim 1 wherein said oxidizable material is selected from the group consisting of polysilicon and silicon-rich dioxide.
Claim 10
Dependent Claim 17 words
The method of claim 1 wherein said step of depositing an oxidizable material comprises depositing epitaxial silicon.
Claim 11
Dependent Claim 22 words
The method of claim 8 wherein said step of oxidizing completely consumes said conformal layer converting said conformal layer to silicon dioxide.
Claim 12
Independent Claim 150 words
A method for forming a semiconductor device comprising the steps of: providing a silicon substrate having active surface regions; forming a pad oxide layer to overlie said substrate; depositing a layer of nitride to overlie said pad oxide; forming a photoresist mask over active regions of said substrate; etching said nitride and said pad oxide layer to form portions thereof overlying said active surface regions of said silicon substrate and leaving exposed portions of said substrate; removing said photoresist mask; etching said portions of said pad oxide layer to form a recess under an edge portion of said portion of said nitride layer; depositing a layer of polysilicon to overlie said portions of said nitride layer and substantially filling said recess with said layer of polysilicon; and oxidizing said polysilicon layer and said exposed portions of said substrate to form electrical isolation regions in said exposed portions of said substrate.
Claim 13
Independent Claim 150 words
A method for forming a semiconductor device comprising the steps of: providing a silicon substrate having active surface regions; forming a pad oxide layer to overlie said substrate; depositing a layer of nitride to overlie said pad oxide; forming a photoresist mask over active regions of said substrate; etching said nitride and said pad oxide layer to form portions thereof overlying said active surface regions of said silicon substrate and leaving exposed portions of said substrate; removing said photoresist mask; etching said portions of said pad oxide layer to form a recess under an edge portion of said portion of said nitride layer; depositing a layer of polysilicon to overlie said portions of said nitride layer and substantially filling said recess with said layer of polysilicon; and oxidizing said polysilicon layer and said exposed portions of said substrate to form electrical isolation regions in said exposed portions of said substrate.
Claim 14
Dependent Claim 52 words
The method of claim 11 further comprising the step of anisotropically etching said polysilicon layer to form a portion of said polysilicon layer bounding said portion of said nitride layer and said portion of said pad oxide layer and substantially planar with the top surface of said portion of said nitride layer.
Claim 15
Dependent Claim 38 words
The method of claim 11 further comprising the step of removing said portion of said nitride layer and said portion of said pad oxide layer subsequent to oxidizing said polysilicon layer and said exposed portions of said substrate.
Claim 16
Dependent Claim 22 words
The method of claim 11 wherein said step of oxidizing completely consumes said polysilicon layer converting said polysilicon layer to silicon dioxide.
Claim 17
Independent Claim 246 words
A method for forming electrical isolation structures in a silicon substrate wherein said isolation structures are substantially planar with the surface of said substrate comprising the steps of: providing a silicon substrate having active surface regions; forming a pad oxide layer to overlie said substrate; depositing a layer of nitride to overlie said pad oxide; forming a photoresist mask over active regions of said substrate; etching said nitride and said pad oxide layer to form portions thereof overlying said active surface regions of said silicon substrate and leaving exposed portions of said substrate; etching said portions of said pad oxide layer to form a recess under an edge portion of said portion of said nitride layer; removing said photoresist mask; depositing a layer of polysilicon to overlie said portions of said nitride layer substantially filling said recess with said deposited layer of polysilicon; anisotropically etching said polysilicon layer to form a portion of said polysilicon layer bounding said portion of said nitride layer and said portion of said pad oxide layer and substantially planar with the top surface of said portion of said nitride layer; etching said exposed portions of said substrate to form depressions therein; etching said depressions to remove a surface layer of silicon from said depressions; oxidizing said polysilicon layer and said depressions of said substrate to form electrical isolation regions in said depressions of said substrate; and removing said portions of said nitride layer and said portions of said pad oxide layer.
Claim 18
Independent Claim 246 words
A method for forming electrical isolation structures in a silicon substrate wherein said isolation structures are substantially planar with the surface of said substrate comprising the steps of: providing a silicon substrate having active surface regions; forming a pad oxide layer to overlie said substrate; depositing a layer of nitride to overlie said pad oxide; forming a photoresist mask over active regions of said substrate; etching said nitride and said pad oxide layer to form portions thereof overlying said active surface regions of said silicon substrate and leaving exposed portions of said substrate; etching said portions of said pad oxide layer to form a recess under an edge portion of said portion of said nitride layer; removing said photoresist mask; depositing a layer of polysilicon to overlie said portions of said nitride layer substantially filling said recess with said deposited layer of polysilicon; anisotropically etching said polysilicon layer to form a portion of said polysilicon layer bounding said portion of said nitride layer and said portion of said pad oxide layer and substantially planar with the top surface of said portion of said nitride layer; etching said exposed portions of said substrate to form depressions therein; etching said depressions to remove a surface layer of silicon from said depressions; oxidizing said polysilicon layer and said depressions of said substrate to form electrical isolation regions in said depressions of said substrate; and removing said portions of said nitride layer and said portions of said pad oxide layer.
Claim 19
Dependent Claim 22 words
The method of claim 15 wherein said step of oxidizing completely consumes said polysilicon layer converting said polysilicon layer to silicon dioxide.

References Cited (Backward Citations)

JPS5410688A Cited
JPS56103443A Cited
DE3131746A1 Cited
EP0071203A2 Cited
EP0075875A2 Cited
JPS604237A Cited
US4636281A Cited
JPS61247051A Cited
JPS61276342A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-05-21 1993-11-20 1994-05-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-05-21 1997-11-20 1998-05-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-05-21 2001-11-20 2002-05-22 $7700.00 Window Closed / Lapsed

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