Patent US4922548A successfully refreshed from Google Patents.
US4922548A
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Frequency signal synthesiser
Assignee: Plessey Semiconductors Ltd
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Filing: 1989-05-30
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Granted: 1990-05-01
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Expires: 2009-05-30
Abstract
Abstract In the present invention a switchable synthesizer is disclosed wherein a single loop is used to lock any one of a plurality of control signals by multiplexing the frequencies into and control signals out of the specific frequencies loop to control the frequency generators.
Inventors
- 👤 Nicholas P. Cowley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 13:10
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/44; H04N5/50; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/14; H03L7/141; H03L7/16; H03L7/18; H03L7/183
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
163 words
A frequency signal synthesiser comprising a comparison frequency generating element to provide a comparison frequency signal, a multiplexer element for selecting one of a plurality of generated radio frequency signals, a frequency divider element, a frequency mixer element and control means, the frequency synthesiser, in operation, being arranged whereby the multiplexer element is coupled, to feed a selected one of the plurality of radio frequency to the frequency divider element whilst the control means is coupled to the divider element such that a respective one of a series of divider words are fed to the divider element and each radio frequency signal is divided by its respective divided word to provide a common dividend frequency signal, the comparison frequency signal and the dividend frequency signal being fed to the frequency mixer element to provide a control signal indicative of frequency difference between the comparison frequency signal and the dividend frequency signal, the control signal being arranged to control it's respective radio frequency signal.
Claim 2
Dependent Claim
163 words
A frequency signal synthesiser comprising a comparison frequency generating element to provide a comparison frequency signal, a multiplexer element for selecting one of a plurality of generated radio frequency signals, a frequency divider element, a frequency mixer element and control means, the frequency synthesiser, in operation, being arranged whereby the multiplexer element is coupled, to feed a selected one of the plurality of radio frequency to the frequency divider element whilst the control means is coupled to the divider element such that a respective one of a series of divider words are fed to the divider element and each radio frequency signal is divided by its respective divided word to provide a common dividend frequency signal, the comparison frequency signal and the dividend frequency signal being fed to the frequency mixer element to provide a control signal indicative of frequency difference between the comparison frequency signal and the dividend frequency signal, the control signal being arranged to control it's respective radio frequency signal.
Claim 3
Dependent Claim
17 words
A synthesiser as claimed in claim 1 wherein the comparison frequency generating element is a crystal oscillator.
Claim 4
Dependent Claim
59 words
A synthesiser as claimed in either claim 1 wherein the synthesiser in operation is controlled by the control means such that a control time cycle is defined comprising a plurality of sub-cycles, each of the plurality of generated radio frequency signals being attributed to a sub-cycle whereby frequency lock for that generated radio frequency is determined in that sub-cycle.
Claim 5
Dependent Claim
21 words
A synthesiser as claimed in claim 3 wherein a timing generator is provided to define, in operation, the control time cycle.
Claim 6
Dependent Claim
37 words
A synthesiser as claimed in claim 1 wherein the frequency mixer element is coupled to a control multiplexer element whereby each control signal can be fed to control its respective generated radio frequency through a control line.
Claim 7
Dependent Claim
33 words
A synthesiser as claimed in claim 5 wherein the control line includes a memory element whereby the control signal can be maintained upon the control whilst the synthesiser proceeds through the pre-determined sequence.
Claim 8
Dependent Claim
49 words
A synthesiser as claimed in claim 1 including a plurality of buffers, each buffer being arranged to hold a divider word, and multiplexing means controlled by the control means to feed a corresponding divider word to the divider element when the multiplexer element feeds a selected ratio frequency thereto.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-04-30 | 1993-10-30 | 1994-05-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-04-30 | 1997-10-30 | 1998-05-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-04-30 | 2001-10-30 | 2002-05-01 | $7700.00 | Window Closed / Lapsed |