US4330758A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Synchronized frequency synthesizer with high speed lock
Assignee: Motorola Solutions Inc
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Filing: 1980-02-20
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Granted: 1982-05-18
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Expires: 2000-02-20
Abstract
Abstract An improved frequency synthesizer utilizes a first order loop and sample-and-hold phase detector with optimized gain to obtain very fast frequency locking characteristics. In addition, synchronization of the programming of the loop divider and of the range shifting the voltage controlled oscillator is also utilized. An adaptive loop filter is provided to allow a first order loop to be used for lock acquisition and still maintain excellent noise performance after lock has been obtained.
Inventors
- 👤 Scott N. Swisher
- 👤 Richard E. Barnett
- 👤 Paul K. Griner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 23:03
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/16; H03L7/18; H03L7/183; H03L7/187; H03L7/08; H03L7/10; H03L7/107; H03L7/1075; H03L7/1077; H03L2207/00; H03L2207/06
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
160 words
An improved fast-lock frequency synthesizer comprising: a. a reference signal source for generating a reference signal of frequency F REF ; b. a voltage controlled oscillator, for producing an oscillator signal at its output in response to a control signal applied to its input and having a gain K V ; c. programmable divider means for frequency dividing the controlled oscillator signal by a divisor N; d. a sample-and-hold phase comparator means, having a first input coupled to the reference signal source, a second input coupled to the divider means, and an output coupled to the voltage controlled oscillator, for producing the control signal at its output, representative of the phase difference of the signals received at the first and second input, said phase comparator having a gain K.sub.φ approximately given by the expression K 100 =N×F REF /K V , where K.sub.φ is expressed in volts/radian, F REF is expressed in hertz, and K V is expressed in radians/volt-sec.
Claim 2
Dependent Claim
160 words
An improved fast-lock frequency synthesizer comprising: a. a reference signal source for generating a reference signal of frequency F REF ; b. a voltage controlled oscillator, for producing an oscillator signal at its output in response to a control signal applied to its input and having a gain K V ; c. programmable divider means for frequency dividing the controlled oscillator signal by a divisor N; d. a sample-and-hold phase comparator means, having a first input coupled to the reference signal source, a second input coupled to the divider means, and an output coupled to the voltage controlled oscillator, for producing the control signal at its output, representative of the phase difference of the signals received at the first and second input, said phase comparator having a gain K.sub.φ approximately given by the expression K 100 =N×F REF /K V , where K.sub.φ is expressed in volts/radian, F REF is expressed in hertz, and K V is expressed in radians/volt-sec.
Claim 3
Dependent Claim
54 words
The improved fast-lock frequency synthesizer of claim 1 further comprising means for synchronously programming the divider means from an old divisor to a new divisor by loading the new divisor so that the divider means does not begin counting by the new divisor before the divider means completes a count by the old divisor.
Claim 4
Dependent Claim
51 words
The improved fast-lock frequency synthesizer of claim 2 wherein the voltage controlled oscillator operates over a plurality of frequency ranges, further comprising means for synchronously shifting the frequency range of the voltage controlled oscillator by range shifting in response to the divider means having completed the count utilizing the old divisor.
Claim 5
Dependent Claim
106 words
The improved fast-lock frequency synthesizer of claims 1, 2 or 3 further comprising: signal processing means including filtering means, and having an input coupled to the output of the phase comparator means and an output coupled to the voltage controlled oscillator input, said signal processing means for connecting, for a period of time required to permit the frequency synthesizer to acquire the desired frequency, the input directly to the output in response to a change in the loop divisor and for coupling at all other times, the input to the filtering means for filtering the control signal and applying the filtered control signal to the output.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-05-17 | 1985-11-16 | 1986-05-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-05-17 | 1989-11-16 | 1990-05-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-05-17 | 1993-11-16 | 1994-05-18 | $7700.00 | Window Closed / Lapsed |