← Back to Patent Explorer
US4296407A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital frequency synthesizer with frequency divider programmable in response to stored digital control signal

Assignee: Panasonic Holdings Corp
•
Filing: 1979-05-14
•
Granted: 1981-10-20
•
Expires: 1999-05-14
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A digital frequency synthesizer comprises a programmable frequency divider, an analog-to-digital converter for converting an analog program control signal into a digital signal, and a digital storage medium for storing the digital signal to control the frequency division ratio of the programmable frequency divider in accordance with the digital value of the stored signal.

Inventors

  • 👤 Hiroshi Minakuchi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 23:12
CPC Classifications
H; H03; H03J; H03J5/00; H03J5/02; H03J5/0245; H03J5/0254; H03K; H03K23/00; H03K23/64; H03K23/66

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 288 words
A digital frequency synthesizer having a programmable frequency divider for dividing the frequency of a standard frequency signal by a variable integral multiple, comprising, means for generating a manually adjustable analog control signal, analog-to-digital converter means for converting said analog control signal into a digital signal, and a storage medium for storing said digital signal, the output of said storage medium representing said integral multiple; wherein said analog-to-digital converter means comprises means for detecting the difference between said analog control signal and the stored digital signal to reset said storage medium to the digital signal generated at the instant said difference exceeds a predetermined value; and further wherein said difference detecting means comprises: a source of clock pulses; a first binary counter receptive of said clock pulses to generate a digital signal varying stepwisely in response to each clock pulse, the output of said binary counter being connected to the input of said digital storage medium; a digital comparator for generating an output signal in response to the occurrence of a coincidence between the input and output of said storage medium; a digital-to-analog converter connected to the output of said binary counter to convert said digital signal into a corresponding analog signal; an analog comparator for generating an output signal in response to the occurrence of a coincidence between said analog control signal and said analog signal delivered from said digital-to-analog converter; and means for resetting said storage medium to store the instantaneous value of the digital signal generated by said first binary counter when the interval elapsed between the time of generation of an output signal of said digital comparator and the time of generation of an output signal of said analog comparator exceeds a predetermined value.
Claim 2
Dependent Claim 288 words
A digital frequency synthesizer having a programmable frequency divider for dividing the frequency of a standard frequency signal by a variable integral multiple, comprising, means for generating a manually adjustable analog control signal, analog-to-digital converter means for converting said analog control signal into a digital signal, and a storage medium for storing said digital signal, the output of said storage medium representing said integral multiple; wherein said analog-to-digital converter means comprises means for detecting the difference between said analog control signal and the stored digital signal to reset said storage medium to the digital signal generated at the instant said difference exceeds a predetermined value; and further wherein said difference detecting means comprises: a source of clock pulses; a first binary counter receptive of said clock pulses to generate a digital signal varying stepwisely in response to each clock pulse, the output of said binary counter being connected to the input of said digital storage medium; a digital comparator for generating an output signal in response to the occurrence of a coincidence between the input and output of said storage medium; a digital-to-analog converter connected to the output of said binary counter to convert said digital signal into a corresponding analog signal; an analog comparator for generating an output signal in response to the occurrence of a coincidence between said analog control signal and said analog signal delivered from said digital-to-analog converter; and means for resetting said storage medium to store the instantaneous value of the digital signal generated by said first binary counter when the interval elapsed between the time of generation of an output signal of said digital comparator and the time of generation of an output signal of said analog comparator exceeds a predetermined value.
Claim 3
Dependent Claim 116 words
A digital frequency synthesizer as claimed in claim 1, wherein said resetting means comprises: a second binary counter for generating an output signal in response to receipt of a predetermined number of said clock pulses when enabled; an Exclusive-OR gate having a first input terminal connected to be responsive to the output of said analog comparator and a second input terminal connected to be responsive to the output of said digital comparator to generate an output signal for enabling said second binary counter; and a control gate for applying an output signal from said analog comparator to said storage medium to reset the same in the presence of said output signal from said second binary counter.
Claim 4
Dependent Claim 54 words
A digital frequency synthesizer as claimed in claim 1, wherein said clock source comprises a standard frequency signal source to supply a standard frequency signal to said programmable frequency divider and a frequency divider having a fixed value of frequency division ratio connected to said standard frequency signal source to generate said clock pulses.
Claim 5
Dependent Claim 123 words
A digital frequency synthesizer as claimed in claim 1, further comprising a voltage source for supplying a voltage to said digital-to-analog converter so that the analog signal delivered therefrom varies in accordance with variation of said voltage supplied from said voltage source, and wherein said manually adjustable analog control signal generating means comprises a potentiometer connected to said voltage source to develop a voltage at the wiper terminal thereof which is also variable in accordance with voltage variation of said voltage source, said analog comparator includes a first input terminal connected to receive an analog signal from said digital-to-analog converter and a second input terminal connected to said wiper terminal of said potentiometer, whereby said voltage variation is cancelled in said analog comparator.
Claim 6
Dependent Claim 18 words
A digital frequency synthesizer as claimed in claim 4, wherein said voltage source is a voltage stabilized source.
Claim 7
Dependent Claim 77 words
A digital frequency synthesizer as claimed in claim 4, wherein said digital-to-analog converter comprises a resistance ladder network having a plurality of circuit nodes connected to receive said digital signal from said first binary counter and means for equalizing the maximum value of a voltage developed by said ladder network to the voltage supplied from said voltage source, said equalized output voltage of said ladder network being supplied to said first input terminal of said analog comparator.
Claim 8
Independent Claim 251 words
A method for synthesizing a signal at a desired frequency using a programmable frequency divider adapted to receive an input standard frequency signal to deliver an output signal of which the frequency is the input frequency divided by a variable integral multiple, comprising: (a) generating a manually adjustable analog control signal; (b) generating a digital signal stepwisely varying in response to a clock pulse to represent a digital equivalent of analog sawtooth waves; (c) storing the instantaneous value of said digital signal into a resettable storage medium; (d) converting said digital signal into analog sawtooth waves; (e) repeatedly comparing the instantaneous value of said analog converted sawtooth waves with said analog control signal to generate an output signal at one of two discrete values depending on whether said instantaneous value is above or below said control signal; (f) repeatedly detecting a coincidence between the instantaneous value of said digital signal with the stored contents of said storage medium; (g) repeatedly detecting the length of time between the generation of said output signal in the step (e) and the detection of said coincidence in the step (f); and (h) resetting said storage medium, when said detected length of time is greater than a predetermined value, to store the instantaneous value of said digital signal generated in the step (c) in concurrence with an output signal subsequently generated in the step (e); and (i) applying the digital signal stored in said storage medium to said programmable frequency divider to control the frequency thereof.
Claim 9
Independent Claim 251 words
A method for synthesizing a signal at a desired frequency using a programmable frequency divider adapted to receive an input standard frequency signal to deliver an output signal of which the frequency is the input frequency divided by a variable integral multiple, comprising: (a) generating a manually adjustable analog control signal; (b) generating a digital signal stepwisely varying in response to a clock pulse to represent a digital equivalent of analog sawtooth waves; (c) storing the instantaneous value of said digital signal into a resettable storage medium; (d) converting said digital signal into analog sawtooth waves; (e) repeatedly comparing the instantaneous value of said analog converted sawtooth waves with said analog control signal to generate an output signal at one of two discrete values depending on whether said instantaneous value is above or below said control signal; (f) repeatedly detecting a coincidence between the instantaneous value of said digital signal with the stored contents of said storage medium; (g) repeatedly detecting the length of time between the generation of said output signal in the step (e) and the detection of said coincidence in the step (f); and (h) resetting said storage medium, when said detected length of time is greater than a predetermined value, to store the instantaneous value of said digital signal generated in the step (c) in concurrence with an output signal subsequently generated in the step (e); and (i) applying the digital signal stored in said storage medium to said programmable frequency divider to control the frequency thereof.
Claim 10
Dependent Claim 122 words
A digital frequency synthesizer having a programmable frequency divider for dividing the frequency of an input signal by a programming value, comprising: means for generating a manually adjustable analog control signal; analog-to-digital converter means for converting said analog control signal into a corresponding digital control signal; a digital storage medium for storing said digital control signal therein for application to said programmable counter as said programming value; and means for detecting the difference in value between said digital control signal at the output of said analog-to-digital converter means and said digital control signal stored in said storage medium for writing said digital control signal at the output of said converter means into said storage medium when said difference exceeds a predetermined value.
Claim 11
Dependent Claim 122 words
A digital frequency synthesizer having a programmable frequency divider for dividing the frequency of an input signal by a programming value, comprising: means for generating a manually adjustable analog control signal; analog-to-digital converter means for converting said analog control signal into a corresponding digital control signal; a digital storage medium for storing said digital control signal therein for application to said programmable counter as said programming value; and means for detecting the difference in value between said digital control signal at the output of said analog-to-digital converter means and said digital control signal stored in said storage medium for writing said digital control signal at the output of said converter means into said storage medium when said difference exceeds a predetermined value.
Claim 12
Dependent Claim 177 words
A digital frequency synthesizer comprising: means for generating an analog control signal; a binary counter for generating a digital signal in response to a clock pulse; a digital storage medium which stores said digital signal in response to a reset signal applied thereto; a programmable frequency divider for dividing the frequency of a standard frequency signal by the output of said digital storage medium; a digital comparator for generating an output signal in response to the occurrence of a coincidence between the input and output of said storage medium; a digital-to-analog converter connected to the output of said binary counter to convert said digital signal into a corresponding analog signal; an analog comparator for generating an output signal in response to the occurrence of a coincidence between said analog control signal and said analog signal from said digital-to-analog converter; and means for generating said reset signal when the interval between the time of generation of an output from said digital comparator and the time of generation of an output from said analog comparator exceeds a predetermined value.
Claim 13
Dependent Claim 177 words
A digital frequency synthesizer comprising: means for generating an analog control signal; a binary counter for generating a digital signal in response to a clock pulse; a digital storage medium which stores said digital signal in response to a reset signal applied thereto; a programmable frequency divider for dividing the frequency of a standard frequency signal by the output of said digital storage medium; a digital comparator for generating an output signal in response to the occurrence of a coincidence between the input and output of said storage medium; a digital-to-analog converter connected to the output of said binary counter to convert said digital signal into a corresponding analog signal; an analog comparator for generating an output signal in response to the occurrence of a coincidence between said analog control signal and said analog signal from said digital-to-analog converter; and means for generating said reset signal when the interval between the time of generation of an output from said digital comparator and the time of generation of an output from said analog comparator exceeds a predetermined value.
Claim 14
Dependent Claim 119 words
A digital frequency synthesizer as claimed in claim 9, wherein said reset signal generating means comprises a second binary counter for generating an output signal in response to receipt of a predetermined number of clock pulses, an Exclusive-OR gate having a first input terminal connected to be responsive to the output of said analog comparator and a second input terminal connected to be responsive to the output of said digital comparator for generating an output signal for enabling said second binary counter to receive the clock pulses, and a control gate for applying an output signal from said analog comparator said storage medium to reset the same in the presence of said output signal from said second binary counter.

References Cited (Backward Citations)

US3764831A Cited
US3800236A Cited
US3790910A Cited
US3918048A Cited
US3913028A Cited
US4127766A Cited
US4192993A Cited
US4140925A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-10-19 1985-04-20 1985-10-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-10-19 1989-04-20 1989-10-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-10-19 1993-04-20 1993-10-20 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag