US3918048A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Apparatus for testing the resolution of an analog to digital converter
Assignee: United States Department of the Navy
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Filing: 1974-04-15
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Granted: 1975-11-04
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Expires: 1994-04-15
Abstract
Abstract An oscillator provides an f1v1 analog signal to a summing amplifier. The same oscillator signal is conducted through a frequency multiplier and voltage attenuator to produce an f2v2 signal also applied to the summing amplifier. The amplifier output is converted to digital signal samples by the analog to digital (A/D) converter to be tested and a computer counts the number of f2 samples in an f1 sample. By comparing received f2 samples with the expected f2 samples, resolution is determined.
Inventors
- 👤 Glen I Omura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 20:56
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/3185; G01R31/318502; G06; G06F; G06F11/00; G06F11/22; G06F11/26; G06F11/273; G06F11/277; H; H03; H03M; H03M1/00; H03M1/10; H03M1/1071
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
141 words
Apparatus for testing the resolution of an analog to digital converter comprising: a signal source means providing an analog signal having a predetermined frequency and voltage (f1v1), a voltage summing amplifier having first and second inputs, said first input being directly coupled to said signal source means, electrical circuit means coupling said signal source means to said second amplifier input, said circuit including: frequency modifying means, and voltage-modifying means, whereby a second analog signal (f2v2) is summed with said f1v1 signal in said summing amplifier, and an analog to digital converter having an input coupled to said amplifiEr output for producing in-phase digital samples representative of the f1v1 and f2v2 analog signals, whereby resolution at said v2 voltage can be determined by digitally counting the number of f2 samples in an f1 sample and comparing the count with known resolution data.
Claim 2
Dependent Claim
141 words
Apparatus for testing the resolution of an analog to digital converter comprising: a signal source means providing an analog signal having a predetermined frequency and voltage (f1v1), a voltage summing amplifier having first and second inputs, said first input being directly coupled to said signal source means, electrical circuit means coupling said signal source means to said second amplifier input, said circuit including: frequency modifying means, and voltage-modifying means, whereby a second analog signal (f2v2) is summed with said f1v1 signal in said summing amplifier, and an analog to digital converter having an input coupled to said amplifiEr output for producing in-phase digital samples representative of the f1v1 and f2v2 analog signals, whereby resolution at said v2 voltage can be determined by digitally counting the number of f2 samples in an f1 sample and comparing the count with known resolution data.
Claim 3
Dependent Claim
12 words
The apparatus of claim 1 wherein said voltage-modifying means is a potentiometer.
Claim 4
Dependent Claim
13 words
The apparatus of claim 1 wherein said signal source means is an oscillator.
Claim 5
Dependent Claim
13 words
The apparatus of claim 3 wherein said frequency-modifying means is a frequency multiplier.
Claim 6
Dependent Claim
12 words
The apparatus of claim 3 wherein said frequency-modifying means is a frequency-divider.
Claim 7
Dependent Claim
23 words
The apparatus of claim 1 wherein said voltage-modifying means is adjustable to successively test the converter resolution at a plurality of v2 voltages.
Claim 8
Dependent Claim
34 words
The apparatus of claim 6 further including a digital computer means adapted to be coupled to the output of said A/D converter for counting the f2 samples produced by said plurality of v2 voltages.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-11-03 | 1979-05-05 | 1979-11-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-11-03 | 1983-05-05 | 1983-11-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-11-03 | 1987-05-05 | 1987-11-04 | $7700.00 | Window Closed / Lapsed |