Insulated-gate field-effect semiconductor device with doped regions in channel to raise breakdown voltage

Claim 2

An insulated-gate field-effect semiconductor device comprising: (a) a semiconductor layer of a first conductivity type, the semiconductor layer having a surface portion; (b) heavily doped source and drain regions of a second conductivity type in said semiconductor layer, said source and drain regions being spaced apart from each other along the surface portion of said semiconductor layer; (c) a plurality of heavily doped island regions of said second conductivity type in said semiconductor layer, the plurality of heavily doped island regions located between and spaced apart from said source and drain regions, said island regions occupying locations disposed transversely of the direction between said source and drain regions; (d) an insulating layer on said surface portion; (e) a conductive layer overlaying said insulating layer and electrically isolated from said island regions, said conductive layer extending between said source and drain regions and said conductive layer having a plurality of closed boundary apertures aligned with individual ones of said island regions in said semiconductor layer.

Claim 3

The insulated-gate field-effect semiconductor device as set forth in claim 1 in which said plurality of island regions are elongate strips, at least one of said elongate strips located in the vicinity of said drain region, and extending transversely of the direction between said source and drain regions.

Claim 4

The insulated-gate field-effect semiconductor device as set forth in claim 1, in which said conductive layer is embedded within said insulating layer.

Claim 5

The insulated-gate field-effect semiconductor device as set forth in claim 1, in which said island regions form an elongate array comprising spaced apart rows extending transversely of a direction between said source and drain regions, each row comprising a plurality of island regions.

Claim 6

The insulated-gate field-effect semiconductor device as set forth in claim 3, further comprising a metallization layer overlaying said insulating layer, said metallization layer providing a drain region contact and extending from said drain region to a near portion of said source region.

Claim 7

An insulated-gate field-effect semiconductor device comprising: (a) a semiconductor layer of a first conductivity type, the semiconductor layer having a surface portion; (b) heavily doped source and drain regions of a second conductivity type in said semiconductor layer, the second conductivity type being opposite to said first conductivity type, said source and drain regions being spaced apart from each other along the surface portion of said semiconductor layer; (c) a plurality of island regions of said second conductivity type in semiconductor layer, the heavily doped island regions being spaced apart from said source and drain regions in the area of said semiconductor layer which intervenes between said source and drain regions, and occupying locations disposed transversely of the direction between said source and drain regions; (d) a gate insulation layer on said surface portion, and (e) a conductive layer electrically isolated from said island regions and having a portion on said gate insulation layer, said portion of the conductive layer being substantially coextensive with the area of said semiconductor layer which intervenes between said source and drain regions and said conductive layer has closed boundary apertures substantially aligned with respective ones of said island regions in said semiconductor layer.

Claim 8

An insulated-gate field-effect semiconductor device comprising: (a) a semiconductor layer of a first conductivity type, the semiconductor layer having a surface portion; (b) heavily doped source and drain regions of a second conductivity type in said semiconductor layer, the second conductivity type being opposite to said first conductivity type, said source and drain regions being spaced apart from each other along the surface portion of said semiconductor layer; (c) a plurality of island regions of said second conductivity type in semiconductor layer, the heavily doped island regions being spaced apart from said source and drain regions in the area of said semiconductor layer which intervenes between said source and drain regions, and occupying locations disposed transversely of the direction between said source and drain regions; (d) a gate insulation layer on said surface portion, and (e) a conductive layer electrically isolated from said island regions and having a portion on said gate insulation layer, said portion of the conductive layer being substantially coextensive with the area of said semiconductor layer which intervenes between said source and drain regions and said conductive layer has closed boundary apertures substantially aligned with respective ones of said island regions in said semiconductor layer.

Claim 9

The insulated-gate field-effect semiconductor device as set forth in claim 6, in which said conductive layer is extensive substantially throughout said area of said semiconductor layer.

Claim 10

The insulated-gate field-effect semiconductor device as set forth in claim 6, in which said island regions are distributed substantially uniformly throughout said area of said semiconductor layer.

Claim 11

The insulated-gate field-effect semiconductor device as set forth in claim 6, in which said island regions are located in at least two linear arrays, a first one of the at least two linear arrays having island regions located along and in the vicinity and spaced apart from one of said source and drain regions and a second one of the at least two linear arrays having island regions located along and in the vicinity of the other of said source and drain regions.

Claim 12

The insulated-gate field-effect semiconductor device as set forth in claim 6, further comprising a metallization layer providing a drain region contact and having a portion overlapping said conductive layer and said area of said semiconductor layer which intervenes between said source and drain regions.

Claim 13

The insulated-gate field-effect semiconductor device as set forth in claim 5, further comprising conductive means providing electrical connection between said island regions and a supply source of a predetermined voltage.

Claim 14

An insulated-gate field-effect semiconductor device comprising: (a) a semiconductor layer of a first conductivity type, the semiconductor layer having a surface portion; (b) heavily doped source and drain regions of a second conductivity type in said semiconductor layer, said source and drain regions being spaced apart from each other along the surface portion of said semiconductor layer; (c) a plurality of heavily doped island regions comprising elongate strips of said second conductivity type in said semiconductor layer, said elongate strips located between and spaced apart from said source and drain regions, said elongate strips extending transversely of the direction between said source and drain regions; (d) an insulating layer on said surface portion; (e) a conductive layer overlaying said insulating layer and electrically isolated from said island regions, said conductive layer extending between said source and drain regions and said conductive layer having a plurality of closed boundary apertures aligned with individual ones of said island regions in said semiconductor layer.

Claim 15

An insulated-gate field-effect semiconductor device comprising: (a) a semiconductor layer of a first conductivity type, the semiconductor layer having a surface portion; (b) heavily doped source and drain regions of a second conductivity type in said semiconductor layer, said source and drain regions being spaced apart from each other along the surface portion of said semiconductor layer; (c) a plurality of heavily doped island regions comprising elongate strips of said second conductivity type in said semiconductor layer, said elongate strips located between and spaced apart from said source and drain regions, said elongate strips extending transversely of the direction between said source and drain regions; (d) an insulating layer on said surface portion; (e) a conductive layer overlaying said insulating layer and electrically isolated from said island regions, said conductive layer extending between said source and drain regions and said conductive layer having a plurality of closed boundary apertures aligned with individual ones of said island regions in said semiconductor layer.

Claim 16

The insulated gate field-effect semiconductor device as set forth in claim 1, in which said island regions and said closed boundary apertures have substantially circular boundaries.

Claim 17

The insulated gate field-effect semiconductor device as set forth in claim 6, in which said island regions and said closed boundary apertures have substantially circular boundaries.

Claim 18

The insulated-gate field-effect semiconductor device as set forth in claim 12 further comprising conductive means providing electrical connection between at least one elongated strip and a supply source of a predetermined voltage.