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JPS5723271A Expired / Lapsed JP ⏱️ 0.0 years remaining

Field effect transistor

Assignee: NEC Corp
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Filing: 1980-07-18
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Granted: —
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Expires: 2000-07-18
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Abstract

Abstract PURPOSE:To improve the current capability and obtain stable punch-through dielectric strength, by a method wherein between the source and the drain diffused regions, a diffused layer of the same conductivity type therewith is provided without fixing its potential, and the ability is fixed according to the channel lengths generated at the time the transistor turns on. CONSTITUTION:On the surface of a semiconductor substrate 12 of a one conductivity type, a drain region 6 and a source region 7 of a reverse conductivity type are formed by diffusion with an interval. Between both the regions 6, 7, a diffused region 8 of the reverse conductivity type is formed with its potential unfixed. Between the regions 6, 8 and 7, 8, gate regions 5 divided while being surrounded with an insulating film are formed, and connected to each other by a gate electrode wiring layer 11. Thus, the substrate surface parts between the regions 6, 8 and 7, 8 are used as channel regions 14, 15 and the first MOS type FET is constituted by the regions 5, 6, 8, while the second MOS type FET is constituted by the regions 5, 7, 8. Thereby high current capability and high dielectric strength are obtained.

Inventors

  • 👤 Shigeru Koshimaru

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 22:51
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60

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