Bipolar transistor structure for very high speed circuits and method for the manufacture thereof

Claim 1

A method for the manufacture of a very high speed bipolar transistor which comprises: (a) depositing an epitaxial layer of the second conductivity type on a silicon substrate of the first conductivity type; (b) generating isolating regions of a dielectric material within said epitaxial layer and in said silicon substrate to separate active transistor regions in said substrate; (c) implanting ions of said first conductivity type into said epitaxial layer of said second conductivity type; (d) sequentially depositing on said substrate a layered structure composed of a layer of insulating material, a layer of conductive material of the second conductivity type and a second layer of insulating material; (e) selectively anisotropically etching said layer structure such that said layer structure covers the portion of said substrate over which an emitter terminal is to be formed; (f) depositing a layer of conductive material of the second conductivity type over at least the edges of said layer structure in a thickness corresponding to the width of the emitter to be formed therein; (g) anisotropically etching said last named layer to produce sidewall etching residues at the edges of said layer structure; (h) applying a surface-wide insulating layer over the substrate; (i) re-etching the surface-wide insulating layer to produce sidewall insulating layers at said etching residues; (j) depositing a double layer of conductive material of the first conductivity type and an insulating layer over the resulting surface; (k) anisotropically etching said double layer to define a base terminal; (l) depositing and re-etching an insulating layer to produce sidewall insulating layers at said base terminal; (m) depositing a conductive material of the second conductivity type and structuring the same to form emitter and collector terminals; (n) subjecting the resulting structure to a high temperature treatment to activate the emitter diffusion zone and the base diffusion zone in said substrate; (o) applying an intermediate oxide layer over the resulting structure; and (p) applying metallic terminal electrodes to the emitter, base and collector terminals.

Claim 2

A method for the manufacture of a very high speed bipolar transistor which comprises: (a) depositing an epitaxial layer of the second conductivity type on a silicon substrate of the first conductivity type; (b) generating isolating regions of a dielectric material within said epitaxial layer and in said silicon substrate to separate active transistor regions in said substrate; (c) implanting ions of said first conductivity type into said epitaxial layer of said second conductivity type; (d) sequentially depositing on said substrate a layered structure composed of a layer of insulating material, a layer of conductive material of the second conductivity type and a second layer of insulating material; (e) selectively anisotropically etching said layer structure such that said layer structure covers the portion of said substrate over which an emitter terminal is to be formed; (f) depositing a layer of conductive material of the second conductivity type over at least the edges of said layer structure in a thickness corresponding to the width of the emitter to be formed therein; (g) anisotropically etching said last named layer to produce sidewall etching residues at the edges of said layer structure; (h) applying a surface-wide insulating layer over the substrate; (i) re-etching the surface-wide insulating layer to produce sidewall insulating layers at said etching residues; (j) depositing a double layer of conductive material of the first conductivity type and an insulating layer over the resulting surface; (k) anisotropically etching said double layer to define a base terminal; (l) depositing and re-etching an insulating layer to produce sidewall insulating layers at said base terminal; (m) depositing a conductive material of the second conductivity type and structuring the same to form emitter and collector terminals; (n) subjecting the resulting structure to a high temperature treatment to activate the emitter diffusion zone and the base diffusion zone in said substrate; (o) applying an intermediate oxide layer over the resulting structure; and (p) applying metallic terminal electrodes to the emitter, base and collector terminals.