← Back to Patent Explorer
US4807103A Expired / Lapsed US ⏱️ 0.0 years remaining

Apparatus for controlling a PWM controlled inverter

Assignee: Toshiba Corp
•
Filing: 1988-02-26
•
Granted: 1989-02-21
•
Expires: 2008-02-26
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An apparatus for controlling a PWM controlled inverter adapted to effect the waveform control of the inverter output voltage in accordance with the memory content of ROM in which instantaneous output voltage data are memorized. This control apparatus comprises a ROM in which the instantaneous output voltage outputs thereof in the PWM control are memorized, and in which the number of addresses within a predetermined electrical angle section is set to a fixed value irrespective of the number of switching times within the electrical angle section, an electrical angle counter in which duration corresponding to the duration time data read from the ROM is set, an address counter responding to the count-up of the electrical angle counter to advance the read address of the ROM, and a controller for controlling the output voltage of the inverter in accordance with an instantaneous output voltage corresponding to the instantaneous output voltage data read from the ROM.

Inventors

  • 👤 Michika Uesugi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 22:10
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/53; H02M7/537; H02M7/539; H02M7/5395

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 138 words
An apparatus for controlling a pulse width modulation (PWM) controlled inverter comprising: a read only memory (ROM) in which instantaneous output voltage data and duration data every respective voltage outputs thereof in the PWM control are memorized, and in which the number of addresses within a section of a predetermined electrical angle is set to a fixed value irrespective of the number of switching times within said section of the electrical angle; an electrical angle counter in which duration corresponding to the duration data read from said ROM is set; an address counter responding to the count-up of said electrical angle counter to advance the read address of said ROM; and means for controlling an output voltage of the inverter in accordance with an instantaneous output voltage corresponding to the instantaneous output voltage data read from said ROM.
Claim 2
Independent Claim 138 words
An apparatus for controlling a pulse width modulation (PWM) controlled inverter comprising: a read only memory (ROM) in which instantaneous output voltage data and duration data every respective voltage outputs thereof in the PWM control are memorized, and in which the number of addresses within a section of a predetermined electrical angle is set to a fixed value irrespective of the number of switching times within said section of the electrical angle; an electrical angle counter in which duration corresponding to the duration data read from said ROM is set; an address counter responding to the count-up of said electrical angle counter to advance the read address of said ROM; and means for controlling an output voltage of the inverter in accordance with an instantaneous output voltage corresponding to the instantaneous output voltage data read from said ROM.
Claim 3
Dependent Claim 41 words
An apparatus for controlling a PWM controlled inverter as set forth in claim 1, wherein said address counter is comprised of a binary up/down counter, the counting direction thereof being reversed in accordance with the content of the most significant bit.
Claim 4
Dependent Claim 38 words
An apparatus for controlling a PWM controlled inverter as set forth in claim 1, which further comprises means for changing the sum total of times of duration in order to vary a frequency of the inverter output voltage.

References Cited (Backward Citations)

US4099109A Cited
JPS55775A Cited
US4410937A Cited
US4513362A Cited
JPS60200773A Cited
US4698744A Cited
US4727468A Cited
JPH119775A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-02-21 1992-08-22 1993-02-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-02-21 1996-08-22 1997-02-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-02-21 2000-08-22 2001-02-21 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag