US4410937A
Expired / Lapsed
US
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Method of controlling polyphase inverters and control circuits therefor
Assignee: Toshiba Corp
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Filing: 1981-08-21
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Granted: 1983-10-18
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Expires: 2001-08-21
Abstract
Abstract Ideal polyphase sinusoidal waveforms are divided into a plurality of consecutive sections having equal width in electric angles, and the sections are encoded for different frequencies to form encoded data which are stored in a ROM. The data stored in the ROM are selectively read out according to a predetermined conduction pattern for an inverter. Then, the read out encoded data are combined in a succession to form positive half cycle waveforms and the read out encoded data are inverted and then combined to form negative half cycle waveforms so as to form polyphase sinusoidal waveforms utilized as control signals of the inverter.
Inventors
- 👤 Michika Uesugi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 08:00
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/505; H02M7/515; H02M7/525; H02M7/527; H02M7/529; H02M7/53; H02M7/537; H02M7/5387; H02M7/53871; H02M7/53873
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
134 words
A method of controlling a polyphase inverter comprising the steps of: dividing ideal polyphase sinusoidal waveforms into a plurality of consecutive sections having specific characteristics and equal width in electric angles; encoding said sections for different frequencies to form a plurality of encoded data; storing the encoded data in a ROM: selectively reading out said encoded data stored in said ROM according to a predetermined conduction pattern of said inverter; combining in a succession said read out encoded data to form positive half cycle waveforms of said polyphase sinusoidal waveforms; inverting said read out encoded data and then combining in a succession to form negative half cycle waveforms respectively succeeding said positive half cycle waveforms thereby forming polyphase sinusoidal waveforms; and applying said polyphase sinusoidal waveforms to said inverter to act as control signals.
Claim 2
Independent Claim
134 words
A method of controlling a polyphase inverter comprising the steps of: dividing ideal polyphase sinusoidal waveforms into a plurality of consecutive sections having specific characteristics and equal width in electric angles; encoding said sections for different frequencies to form a plurality of encoded data; storing the encoded data in a ROM: selectively reading out said encoded data stored in said ROM according to a predetermined conduction pattern of said inverter; combining in a succession said read out encoded data to form positive half cycle waveforms of said polyphase sinusoidal waveforms; inverting said read out encoded data and then combining in a succession to form negative half cycle waveforms respectively succeeding said positive half cycle waveforms thereby forming polyphase sinusoidal waveforms; and applying said polyphase sinusoidal waveforms to said inverter to act as control signals.
Claim 3
Dependent Claim
24 words
The method according to claim 1 wherein said inverter is a three phase inverter and said polyphase sinusoidal waveforms are three phase sinusoidal waveforms.
Claim 4
Dependent Claim
180 words
An inverter control circuit comprising: a ROM; a rate multiplier; means for applying frequency data of a predetermined frequency to said ROM and said rate multiplier; an oscillator for applying a constant frequency signal to said rate multiplier; a frequency divider for dividing a frequency of an output of said rate multiplier; a counter which counts a number of outputs of said frequency divider for storing electric angle data in said ROM; a multistage counter controlled by an output of the last stage of said first mentioned counter; a polyphase decoder controlled by an output of said multistage counter for producing polyphase alternating current signals; a plurality of data selectors respectively controlled by an output of said multistage counter for selectively reading out said electric angle data from said ROM; a plurality of logic gate circuits respectively inputted with outputs of said data selectors and said polyphase output of said polyphase decoder; and a multibit register supplied with noninverted outputs and inverted outputs of said logic gate circuits, and an output of said frequency divider for forming polyphase sinusoidal waveforms.
Claim 5
Dependent Claim
180 words
An inverter control circuit comprising: a ROM; a rate multiplier; means for applying frequency data of a predetermined frequency to said ROM and said rate multiplier; an oscillator for applying a constant frequency signal to said rate multiplier; a frequency divider for dividing a frequency of an output of said rate multiplier; a counter which counts a number of outputs of said frequency divider for storing electric angle data in said ROM; a multistage counter controlled by an output of the last stage of said first mentioned counter; a polyphase decoder controlled by an output of said multistage counter for producing polyphase alternating current signals; a plurality of data selectors respectively controlled by an output of said multistage counter for selectively reading out said electric angle data from said ROM; a plurality of logic gate circuits respectively inputted with outputs of said data selectors and said polyphase output of said polyphase decoder; and a multibit register supplied with noninverted outputs and inverted outputs of said logic gate circuits, and an output of said frequency divider for forming polyphase sinusoidal waveforms.
Claim 6
Dependent Claim
42 words
The inverter control circuit according to claim 3 wherein said inverter comprises a three phase inverter, said multistage counter comprises a 12 stage counter, said data selectors comprise 3 data selectors and said logic gate circuits comprise three exclusive OR gate circuits.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-10-17 | 1987-04-18 | 1987-10-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-10-17 | 1991-04-18 | 1991-10-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-10-17 | 1995-04-18 | 1995-10-18 | $7700.00 | Window Closed / Lapsed |