Patent US4801559A successfully refreshed from Google Patents.
US4801559A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process for forming planar wiring using polysilicon to fill gaps
Assignee: Fujitsu Ltd
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Filing: 1988-02-29
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Granted: 1989-01-31
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Expires: 2008-02-29
Abstract
Abstract A semiconductor device having a conductor line free of cracks is produced by forming an insulating layer on a semiconductor substrate, opening a contact hole in the insulating layer, forming a contact electrode comprising a high-melting point metal or a silicide of a high-melting point in the contact hole, filling a gap between the contact electrode and the side of the contact hole with polycrystalline silicon to form a substantially level surface, forming a conductor line on the level surface, and alloying the polycrystalline silicon with the conductor line and/or the contact electrode by heating.
Inventors
- 👤 Kazunori Imaoka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 23:36
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/062; H10W20/056; H10W20/058; H10W20/40
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
178 words
A method for producing a semiconductor device having a semiconductor substrate, comprising the steps of: (a) forming an insulating layer on the semiconductor substrate; (b) forming a contact hole in the insulating layer; (c) depositing a metal layer over the entire surface of the device and in the contact hole, a portion of the metal layer in the contact hole forming a contact electrode positioned such that a gap is formed between the contact electrode and the sides of the contact hole in the insulating layer; (d) removing the metal layer except for the contact electrode; (e) depositing polycrystalline silicon over the entire surface of the device to form a polycrystalline silicon layer including a wedge-shaped portion in the gap; (f) etching the polycrystalline silicon layer so that a level surface is formed by the insulating layer, wedge-shaped portion and contact electrode; (g) forming a conductor line on the level surface of the contact electrode, the polycrystalline silicon, and the insulating layer; and (h) heating and alloying the polycrystalline silicon with the conductor line and the contact electrode.
Claim 2
Independent Claim
178 words
A method for producing a semiconductor device having a semiconductor substrate, comprising the steps of: (a) forming an insulating layer on the semiconductor substrate; (b) forming a contact hole in the insulating layer; (c) depositing a metal layer over the entire surface of the device and in the contact hole, a portion of the metal layer in the contact hole forming a contact electrode positioned such that a gap is formed between the contact electrode and the sides of the contact hole in the insulating layer; (d) removing the metal layer except for the contact electrode; (e) depositing polycrystalline silicon over the entire surface of the device to form a polycrystalline silicon layer including a wedge-shaped portion in the gap; (f) etching the polycrystalline silicon layer so that a level surface is formed by the insulating layer, wedge-shaped portion and contact electrode; (g) forming a conductor line on the level surface of the contact electrode, the polycrystalline silicon, and the insulating layer; and (h) heating and alloying the polycrystalline silicon with the conductor line and the contact electrode.
Claim 3
Dependent Claim
37 words
A method for producing a semiconductor device according to claim 1, wherein said step (c) of depositing a metal layer comprises selecting a material from the group consisting of molybdenum, tantalum, titanium, tungsten, platinum, and silicides thereof.
Claim 4
Dependent Claim
36 words
A method for producing a semiconductor device according to claim 1, wherein said step (g) of forming the conductor line comprises selecting a metal from the group consisting of aluminum, molybdenum, tantalum, titanium, tungsten and platinum.
Claim 5
Independent Claim
174 words
A method for producing a semiconductor device having a semiconductor substrate, comprising the steps of: (a) forming an insulating layer on the semiconductor substrate; (b) selectively etching the insulating layer and forming a contact hole therein; (c) depositing a metal layer on the insulating layer and in the contact hole, a portion of the metal layer in the contact hole forming a contact electrode positioned in such a way that a wedge-shaped gap is formed between the contact electrode and the sides of the contact hole in the insulating layer; (d) depositing polycrystalline silicon over the entire surface of the device to form a polycrystalline silicon layer including a wedge-shaped portion in the wedge-shaped gap; (e) etching the polycrystalline silicon layer and the metal layer to form a level surface of the insulating layer, wedge-shaped portion and contact electrode; (f) forming a conductor line on the level surface of the insulating layer, the wedge-shaped portion and the contact electrode; and (g) alloying the polycrystalline silicon layer with the conductor line and the contact electrode.
Claim 6
Independent Claim
174 words
A method for producing a semiconductor device having a semiconductor substrate, comprising the steps of: (a) forming an insulating layer on the semiconductor substrate; (b) selectively etching the insulating layer and forming a contact hole therein; (c) depositing a metal layer on the insulating layer and in the contact hole, a portion of the metal layer in the contact hole forming a contact electrode positioned in such a way that a wedge-shaped gap is formed between the contact electrode and the sides of the contact hole in the insulating layer; (d) depositing polycrystalline silicon over the entire surface of the device to form a polycrystalline silicon layer including a wedge-shaped portion in the wedge-shaped gap; (e) etching the polycrystalline silicon layer and the metal layer to form a level surface of the insulating layer, wedge-shaped portion and contact electrode; (f) forming a conductor line on the level surface of the insulating layer, the wedge-shaped portion and the contact electrode; and (g) alloying the polycrystalline silicon layer with the conductor line and the contact electrode.
Claim 7
Independent Claim
185 words
A method for producing a semiconductor device having a semiconductor substrate, comprising the steps of: (a) forming an insulating layer on the semiconductor substrate; (b) selectively etching the insulating layer and forming a contact hole therein; (c) forming a thin polycrystalline silicon layer on the insulating layer and in the contact hole; (d) depositing a metal over the thin polycrystalline silicon layer, a portion of the metal layer in the contact hole forming a contact electrode positioned in such a way that a wedge-shaped gap is formed between the contact electrode and the thin polycrystalline silicon layer; (e) depositing polycrystalline silicon on the entire surface to form a polycrystalline silicon layer including a wedge-shaped portion in the wedge-shaped gap; (f) etching the polycrystalline silicon layer, the metal layer, and the thin polycrystalline silicon layer to form a level surface of the insulating layer, the wedge-shaped portion and the contact electrode; (g) forming a conductor line on the level surface of the insulating layer, the wedge-shaped portion and the contact electrode; and (h) alloying the polycrystalline silicon layer with the conductor line and the contact electrode.
Claim 8
Independent Claim
185 words
A method for producing a semiconductor device having a semiconductor substrate, comprising the steps of: (a) forming an insulating layer on the semiconductor substrate; (b) selectively etching the insulating layer and forming a contact hole therein; (c) forming a thin polycrystalline silicon layer on the insulating layer and in the contact hole; (d) depositing a metal over the thin polycrystalline silicon layer, a portion of the metal layer in the contact hole forming a contact electrode positioned in such a way that a wedge-shaped gap is formed between the contact electrode and the thin polycrystalline silicon layer; (e) depositing polycrystalline silicon on the entire surface to form a polycrystalline silicon layer including a wedge-shaped portion in the wedge-shaped gap; (f) etching the polycrystalline silicon layer, the metal layer, and the thin polycrystalline silicon layer to form a level surface of the insulating layer, the wedge-shaped portion and the contact electrode; (g) forming a conductor line on the level surface of the insulating layer, the wedge-shaped portion and the contact electrode; and (h) alloying the polycrystalline silicon layer with the conductor line and the contact electrode.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-01-31 | 1992-08-01 | 1993-01-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-01-31 | 1996-08-01 | 1997-01-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-01-31 | 2000-08-01 | 2001-01-31 | $7700.00 | Window Closed / Lapsed |