Patent US4801556A successfully refreshed from Google Patents.
US4801556A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Self-aligned bipolar fabrication process
Assignee: British Telecommunications PLC
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Filing: 1987-09-08
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Granted: 1989-01-31
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Expires: 2007-09-08
Abstract
Abstract Regions of the substrate which are to be the collector sinker and the active area of a bipolar transistor are isolated by forming a trench about them and filling it with a dielectric. The dielectric can be oxide formed in a LOCOS process. A dielectric body, which may be nitride, is formed on part of the active area, and base contacts implanted using it as a mask. Polysilicon is deposited over the whole and then cut to form future metallization-to-base contacts. The dielectric body is removed and the base implanted through the resulting aperture. Oxide spacers are formed on the sidewall of the aperture and polysilicon deposited. The polysilicon is doped and used to produce the emitter by driving the dopant into the substrate between the oxide spacers.
Inventors
- 👤 Anthony D. Welbourn
- 👤 Christopher J. H. Heslop
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 21:22
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D10/40; H10D10/441; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; H10P76/00; H10P76/40; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0121; H10W10/0125; H10W10/0126; H10W10/10; H10W10/13; Y; Y10; Y10S; Y10S148/00; Y10S148/01; Y10S148/011; Y10S148/124
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
178 words
A method of fabricating a bipolar transistor comprising emitter, base and collector regions in a semiconductor substrate, the method comprising the steps of: (a) forming a dielectric layer on the surface of the substrate; (b) etching the dielectric and the underlying substrate to produce a recess about the areas of substrate which are to form the active area and the collector sinker of the transistor; (c) filling the recess by forming a dielectric layer therein; (d) forming on the surface of the substrate a further dielectric layer; (e) etching said further dielectric layer to leave a body of dielectric over part of the said area of substrate which is to form the active area; (f) forming base contacts by direct implantation of boron into the substrate adjacent said body; (g) subsequent to step f, forming a layer of conductive material in the substrate about and; in physical contact with said body; and (h) removing said body and implanting the base region in the substrate through the opening left in the conductive material by the removal of the body.
Claim 2
Independent Claim
178 words
A method of fabricating a bipolar transistor comprising emitter, base and collector regions in a semiconductor substrate, the method comprising the steps of: (a) forming a dielectric layer on the surface of the substrate; (b) etching the dielectric and the underlying substrate to produce a recess about the areas of substrate which are to form the active area and the collector sinker of the transistor; (c) filling the recess by forming a dielectric layer therein; (d) forming on the surface of the substrate a further dielectric layer; (e) etching said further dielectric layer to leave a body of dielectric over part of the said area of substrate which is to form the active area; (f) forming base contacts by direct implantation of boron into the substrate adjacent said body; (g) subsequent to step f, forming a layer of conductive material in the substrate about and; in physical contact with said body; and (h) removing said body and implanting the base region in the substrate through the opening left in the conductive material by the removal of the body.
Claim 3
Dependent Claim
81 words
A method as claimed in claim 1 comprising the further steps of: (i) forming non-lithographically, an annular body of dielectric around the inner periphery of the sidewall of the opening left in the conductive layer by the removal of the body; (j) depositing a further layer of a conductive material to contact the substrate within the inner periphery of said annular body; and (k) forming the emitter by driving a dopant from said further layer of conductive material into the substrate.
Claim 4
Dependent Claim
34 words
A method as claimed in claim 1 or claim 2 wherein the dielectric layer within the recess is formed by local oxidation of the substrate silicon, and said further dielectric layer comprises silicon nitride.
Claim 5
Independent Claim
15 words
A method as claimed in claims 1 or 2 wherein the conductive layers comprise polysilicon.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-01-31 | 1992-08-01 | 1993-01-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-01-31 | 1996-08-01 | 1997-01-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-01-31 | 2000-08-01 | 2001-01-31 | $7700.00 | Window Closed / Lapsed |