Patent US4792913A successfully refreshed from Google Patents.
US4792913A
Expired / Lapsed
US
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Simulator for systems having analog and digital portions
Assignee: Grumman Corp
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Filing: 1986-11-03
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Granted: 1988-12-20
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Expires: 2006-11-03
Abstract
Abstract An apparatus for simulating, in an engineering workstation (EW) environment, the operation of circuits or systems having analog and digital portions. Information concerning the system or circuit is acquired with input devices such as a keyboard or mouse with the aid of a display and schematic capture programs. An analog simulator and a digital simulator are present in the EW. A first data extraction program extracts selected analog data from the analog simulator. A first conversion program converts the selected analog data into digital values. A first data insertion program provides the digital values as input (forcing functions) to the digital simulator. A second data extraction program extracts selected digital analysis data from the digital simulator. A second conversion program converts the selected digital data to analog data. A second data insertion program supplies the analog data as input to the analog simulator. Selected portions of the analysis produced by either of the simulators may be presented on the display or a hard copy made by a printer.
Inventors
- 👤 Dennis J. Buckland
- 👤 Robert B. DeRobertis
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 22:06
CPC Classifications
G; G06; G06J; G06J1/00; G06F; G06F30/00; G06F30/20; G06F30/30; G06F30/36; G06F30/367
Claims Analysis
Total Claims: 30
Claim 1
Independent Claim
206 words
In an apparatus for simulating both analog and digital circuits, said apparatus having digital computer input means for inputting data concerning a circuit having at least one analog portion and at least one digital portion, said input means controlling said apparatus, analog analysis means for providing analog data of the analog portion of the circuit, digital analysis means for providing digital analysis data of the digital portion of the circuit, and output means for outputting at least one of said analog and digital analysis data, the improvement comprising: a first data extraction means for extracting selected analog analysis data from said analog analysis means; a first conversion means connected to said first data extraction means for converting the selecting analog anaylsis data into digital values,; a first data insertion means connected to said first conversion means for inserting said digital values into said digital analysis means; a second data extraction means for extracting selected digital anaylsis data from said digital analysis means; a second conversion means connected to said second data extraction means for converting said selected digital analysis data to analog data; and a second data insertion means connected to said second conversion means for inserting the selected analog data into said analog analysis means.
Claim 2
Dependent Claim
206 words
In an apparatus for simulating both analog and digital circuits, said apparatus having digital computer input means for inputting data concerning a circuit having at least one analog portion and at least one digital portion, said input means controlling said apparatus, analog analysis means for providing analog data of the analog portion of the circuit, digital analysis means for providing digital analysis data of the digital portion of the circuit, and output means for outputting at least one of said analog and digital analysis data, the improvement comprising: a first data extraction means for extracting selected analog analysis data from said analog analysis means; a first conversion means connected to said first data extraction means for converting the selecting analog anaylsis data into digital values,; a first data insertion means connected to said first conversion means for inserting said digital values into said digital analysis means; a second data extraction means for extracting selected digital anaylsis data from said digital analysis means; a second conversion means connected to said second data extraction means for converting said selected digital analysis data to analog data; and a second data insertion means connected to said second conversion means for inserting the selected analog data into said analog analysis means.
Claim 3
Dependent Claim
52 words
The apparatus of claim 1, wherein said first data extraction means comprises: a first data storage means; and means for placing said selected analog data in said first storage means, in an array of analog values as a function of time, each analog value being associated with the time of its occurrence.
Claim 4
Dependent Claim
74 words
The apparatus of claim 1, wherein said first conversion means comprises: transition direction determining means for determining the direction of a change in successive values of said selected analog data as a function of time; and logic level comparison means for comparing said successive values to predetermined threshold values for logic transitions in a first direction or in a second direction, as determined by said transition direction determining means, to define digital logic values.
Claim 5
Dependent Claim
52 words
The apparatus of claim 3, further comprising: a second data storage means; and means for placing said digital logic values in said second data storage means in an array of digital logic values as a function of time, each digital logic value being associated with the time of transition in logic value.
Claim 6
Dependent Claim
30 words
The apparatus of claim 1, wherein said first conversion means includes a table defining what digital level to define for an analog voltage provided as said selected analog analysis data.
Claim 7
Dependent Claim
23 words
The apparatus of claim 5, wherein said table includes entries defined in accordance with characteristics of at least one family of digital devices.
Claim 8
Dependent Claim
28 words
The apparatus of claim 1, wherein said analog analysis means comprises rise and fall time defining means for defining the rise and fall times of the analog waveforms.
Claim 9
Dependent Claim
26 words
The apparatus of claim 7, wherein said second conversion meansccomprises user operative modifying means for permitting a user to change the defined rise and fall times.
Claim 10
Dependent Claim
23 words
The apparatus of claim 7, further comprising means for determining whether time values associated with said analog data are monotonically increasing with time.
Claim 11
Dependent Claim
33 words
The apparatus of claim 9, wherein time is defined as being monotonically increasing when the differences between each two successive values of time are larger than one half the rise or fall time.
Claim 12
Dependent Claim
25 words
The apparatus of claim 1, wherein said second conversion means includes means for generating said analog signals so that said analog signals are piecewise linear.
Claim 13
Dependent Claim
44 words
The apparatus of claim 1, wherein said analog analysis means comprises a time base generator for defining increments of time, and means for synchronizing said analog analysis means and said digital analysis means to perform analysis in accordance with the defined increments of time.
Claim 14
Dependent Claim
19 words
The apparatus of claim 1, wherein said analog analysis means includes means for providing at least transient analog analysis.
Claim 15
Dependent Claim
33 words
The apparatus of claim 1, wherein said first conversion means includes load modelling means for modelling the loading effect of inputs to the digital portion of the circuit on the analog analysis data.
Claim 16
Dependent Claim
34 words
The apparatus of claim 1, wherein said second conversion means includes source modelling means for modelling digital output impedance effect of devices modelled in said second conversion means to produce said digital analysis data.
Claim 17
Independent Claim
140 words
A method of simulating both analog and digital ciruits, said method comprising the steps of inputting data concerning a circuit having at least one analog portion and at least one digital portion, said inputting being via digital computer means controlling said steps; providing analog analysis data of the analog portion of the cicuit; providing digital analysis data of the digital portion of the circuit; outputting at least one of said analog and digital analysis data; extracting selected analog analysis data from said analog portion of said circuit; converting the selected analog analysis data into digital values; inserting said digital values into said digital portion of said circuit; extracting selected digital analysis data from said digital portion of said circuit; converting the seeected digital analysis data into analog data; and inserting said analog data into said analog portion of said circuit.
Claim 18
Independent Claim
140 words
A method of simulating both analog and digital ciruits, said method comprising the steps of inputting data concerning a circuit having at least one analog portion and at least one digital portion, said inputting being via digital computer means controlling said steps; providing analog analysis data of the analog portion of the cicuit; providing digital analysis data of the digital portion of the circuit; outputting at least one of said analog and digital analysis data; extracting selected analog analysis data from said analog portion of said circuit; converting the selected analog analysis data into digital values; inserting said digital values into said digital portion of said circuit; extracting selected digital analysis data from said digital portion of said circuit; converting the seeected digital analysis data into analog data; and inserting said analog data into said analog portion of said circuit.
Claim 19
Dependent Claim
50 words
A method as claimed in claim 16, wherein said extracting selected analog analysis data from said analog portion of said circuit includes storing said selected analog analysis data in an array of analog values as a function of time, each analog value being associated with the time of its occurrence.
Claim 20
Dependent Claim
66 words
A method as claimed in claim 16, wherein said converting the selected analog analysis data into digital values includes determining the direction of a change in successive values of said selected analog analysis data as a function of time, and comparing said successive values with predetermined thereshold values for logic transitions in a first direction or in a second direction, as determined to define logic values.
Claim 21
Dependent Claim
40 words
A method as claimed in claim 18, further comprising storing said digital logic values in an array of digital logic values as a funciton of time, each digital logic value being associated with the time of transition in logic value.
Claim 22
Dependent Claim
31 words
A method as claimed in claim 16, wherein said providing analog analysis data of the analog portion of the circuit includes defining the rise and fall times of the analog waveforms.
Claim 23
Dependent Claim
28 words
A method as claimed in claim 20, wherein said converting the selected digital analysis data into analog data includes permitting changing of the defined rise and fall times.
Claim 24
Dependent Claim
24 words
A method as claimed in claim 20, further comprising determining whether time values associated with said analog analysis data are monotonically increasing with time.
Claim 25
Dependent Claim
32 words
A method as claimed in claim 22, wherein time is monotonically increasing whne the differences between each two succesive values of time are larger than one half the rise or fall time.
Claim 26
Dependent Claim
31 words
A method as claimed in claim 16, wherein said converting the selected digital analysis data into analog data includes generating the analog signals so that said analog signals are piecewise linear.
Claim 27
Dependent Claim
63 words
A method as claimed in claim 16, wherein said providing analog analysis data of the analog portion of the circuit includes defining increments of time and synchronizing said providing analog analysis data of the analog portion of the circuit and said providing digital analysis data of the digital portion of the circuit to perform analysis in accordance with the defined increments of time.
Claim 28
Dependent Claim
27 words
A method as claimed in claim 16, wherein said providing analog analysis data of the analog portion of the circuit includes providing at least transient analog analysis.
Claim 29
Dependent Claim
37 words
A method as claimed in claim 16, wherein said converting the selecting analog analysis data into digital values includes modelling the loading effect of inputs to the digital portion of the circuit on the analog analysis data.
Claim 30
Independent Claim
43 words
A method as claimed in claim -6, said converting the selected digital analysis data into analog data includes modelling digital output impedance effect of devices modelled in said converting said selected digital analysis data into analog data to produce said digital analysis data.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-12-20 | 1992-06-20 | 1992-12-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-12-20 | 1996-06-20 | 1996-12-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-12-20 | 2000-06-20 | 2000-12-20 | $7700.00 | Window Closed / Lapsed |