Plasma enhanced chemical vapor deposited vertical silicon nitride resistor

Claim 2

A process for fabricating a resistor in a semiconductor device between two conductive regions, comprising the formation of plasma enhanced chemical vapor deposited (PECVD) semi-insulative film, comprised of silicon-enriched silicon nitride formed of silane, nitrogen and ammonia, between said conductive regions, and said film contacting both said conductive regions and providing electrical resistance between said conductive regions, whereby a resistor element is fabricated.

Claim 3

A process for fabricating an integrated circuit resistor, comprised of silicon-enriched silicon nitride, between two conductive regions which are separated by an insulative layer, comprising the steps of: forming a first conductive region on a substrate; forming a first insulative layer on said first conductive region; opening a window in said first insulative layer; forming a semi-insulative film, comprised of silicon-enriched silicon nitride having a mixture of silane, nitrogen and ammonia and formed by a plasma enhanced chemical vapor deposition technique in said window, said film contacting said first conductive region; forming a second conductive region on said film; whereby a silicon-enriched silicon nitride resistor element is fabricated between said conductive regions.

Claim 4

A process for fabricating an integrated circuit resistor, comprised of silicon-enriched silicon nitride, between two conductive regions which are separated by an insulative layer, comprising the steps of: forming a first conductive region on a substrate; forming a first insulative layer on said first conductive region; opening a window in said first insulative layer; forming a semi-insulative film, comprised of silicon-enriched silicon nitride having a mixture of silane, nitrogen and ammonia and formed by a plasma enhanced chemical vapor deposition technique in said window, said film contacting said first conductive region; forming a second conductive region on said film; whereby a silicon-enriched silicon nitride resistor element is fabricated between said conductive regions.

Claim 5

The process defined by claim 2 further comprisng the steps of: forming a second insulative layer on said first insulative layer prior to forming said window; and opening said window in both said insulative layers.

Claim 6

The process defined by claims 3 wherein said second insulative layer is comprised of glass.

Claim 7

A process for fabricating a silicon-enriched silicon nitride resistor in a semiconductor device, comprising the steps of: forming a first conductive layer on a substrate; forming a first insulative layer on said first conductive layer; opening a window in said first insulative layer; forming a film of silicon-enriched silicon nitride in said window, said silicon-rich silicon nitride film being deposited in said window using a plasma enhanced chemical vapor deposition technique, said silicon-rich silicon nitride film contacting said first conductive layer; forming a second conductive layer on said silicon-rich silicon nitride film, said second conductive layer contacting said silicon-rich silicon nitride film.

Claim 8

A process for fabricating a silicon-enriched silicon nitride resistor in a semiconductor device, comprising the steps of: forming a first conductive layer on a substrate; forming a first insulative layer on said first conductive layer; opening a window in said first insulative layer; forming a film of silicon-enriched silicon nitride in said window, said silicon-rich silicon nitride film being deposited in said window using a plasma enhanced chemical vapor deposition technique, said silicon-rich silicon nitride film contacting said first conductive layer; forming a second conductive layer on said silicon-rich silicon nitride film, said second conductive layer contacting said silicon-rich silicon nitride film.

Claim 9

The process defined by claim 5 wherein said first insulative layer is comprised of an oxide layer.

Claim 10

The process defined by claim 6 wherein said second conductive layer is comprised of a layer of titanium on said silicon-enriched silicon nitride film and a layer of aluminium-silicon on said titanium layer.

Claim 11

The process defined by claim 7 further comprising the steps of: forming a second insulative layer on said first insulative layer prior to opening said window; and opening said window in both said insulative layer.

Claim 12

A process for fabricating a silicon-enriched silicon nitride integrated circuit resistor comprising the steps of: growing a gate-oxide layer on a substrate; removing a portion of said gate-oxide layer to expose said substrate; forming a polysilicon layer on said gate-oxide and said portion of exposed substrate; doping said polysilicon layer by phosphorus diffusion wherein a buried contact region is formed in said portion of exposed substrate; forming a layer of tungsten-silicon on said polysilicon layer; growing an oxide layer on said tungsten-silicon layer; forming an insulative layer on said oxide layer; opening a window in said insulative layer and said oxide layer, wherein said opening extends to said tungsten-silicon layer; forming a film of silicon-enriched silicon nitride in said window, said silicon-enriched silicon nitride film being deposited in said window using a plasma enhanced chemical vapor deposition technique, said silicon-enriched silicon nitride film contacting said tungsten-silicon layer; forming a conductive layer on said silicon-enriched silicon nitride film, said conductive layer having a titanium layer and an aluminum-silicon layer.

Claim 13

A process for fabricating a silicon-enriched silicon nitride integrated circuit resistor comprising the steps of: growing a gate-oxide layer on a substrate; removing a portion of said gate-oxide layer to expose said substrate; forming a polysilicon layer on said gate-oxide and said portion of exposed substrate; doping said polysilicon layer by phosphorus diffusion wherein a buried contact region is formed in said portion of exposed substrate; forming a layer of tungsten-silicon on said polysilicon layer; growing an oxide layer on said tungsten-silicon layer; forming an insulative layer on said oxide layer; opening a window in said insulative layer and said oxide layer, wherein said opening extends to said tungsten-silicon layer; forming a film of silicon-enriched silicon nitride in said window, said silicon-enriched silicon nitride film being deposited in said window using a plasma enhanced chemical vapor deposition technique, said silicon-enriched silicon nitride film contacting said tungsten-silicon layer; forming a conductive layer on said silicon-enriched silicon nitride film, said conductive layer having a titanium layer and an aluminum-silicon layer.

Claim 14

The process defined by claim 9 wherein said insulating layer is comprised of a material selected from the group consisting of phosphorus glass and borophosphosilicate glass.

Claim 15

The process defined by claim 1, wherein said silicon-enriched silicon nitride film is formed by a mixture of silane, nitrogen, and ammonia at an approximate pressure of 0.5-1.5 T, and at a temperature of approximately 308°-505° C.