US4420766A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Reversibly programmable polycrystalline silicon memory element
Assignee: Intersil Corp
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Filing: 1981-02-09
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Granted: 1983-12-13
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Expires: 2001-02-09
Abstract
Abstract A polycrystalline silicon memory element having an impurity concentration in the range of 10 17 to 10 20 atoms per cubic centimeter is reversibly switchable from a high to a low resistance state through a negative resistance region using a voltage above the threshold having a ramped trailing edge.
Inventors
- 👤 Alan J. Kasten
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 08:45
CPC Classifications
H; H10; H10N; H10N70/00; H10N70/011; H10N70/041; H10N70/043; H10N70/20; H10N70/25; H10N70/801; H10N70/821; H10N70/823; H10N70/826; H10N70/881; H10N70/884; Y; Y10; Y10S; Y10S148/00; Y10S148/091; Y10S148/093
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
82 words
A reversibly programmable non-volatile memory element comprising a thin layer of polycrystalline silicon having an impurity concentration in the range of 10 17 to 10 20 atoms per cubic centimeter and a pair of electrode means connected to said thin layer for applying a voltage having a ramped trailing edge to switch said element from a high to a low resistance state and a voltage having a straight trailing edge to switch said element from a low to a high resistance state.
Claim 2
Dependent Claim
82 words
A reversibly programmable non-volatile memory element comprising a thin layer of polycrystalline silicon having an impurity concentration in the range of 10 17 to 10 20 atoms per cubic centimeter and a pair of electrode means connected to said thin layer for applying a voltage having a ramped trailing edge to switch said element from a high to a low resistance state and a voltage having a straight trailing edge to switch said element from a low to a high resistance state.
Claim 3
Dependent Claim
31 words
A reversibly programmable non-volatile memory element according to claim 1 wherein said layer is formed on an insulative layer, and said electrode means makes contact to each end of said layer.
Claim 4
Dependent Claim
53 words
A reversibly programmable non-volatile memory element according to claim 1 wherein said layer is formed in an aperture in an insulative layer on a substrate, and said electrode means includes a doped impurity region of said substrate below said layer forming one terminal, and a second terminal on the top of said layer.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-12-12 | 1987-06-13 | 1987-12-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-12-12 | 1991-06-13 | 1991-12-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-12-12 | 1995-06-13 | 1995-12-13 | $7700.00 | Window Closed / Lapsed |