Amorphous non-volatile ram

Claim 2

In an amorphous memory device having a first logic state represented by a high resistance state and a first threshold voltage level for electrical conduction, the method of storing a second logic state in said device comprising applying a voltage across the device sufficient to cause conduction and crystal growth and terminating said voltage before sufficient crystal growth occurs to create a low resistance state in said device whereby said second logic state is represented by a high resistance state and a second threshold voltage level for electrical conduction lower than said first threshold voltage level.

Claim 3

The method of claim 1 wherein said voltage is applied for less than one microsecond.

Claim 4

The method of claim 1 including erasing said second logic state comprising applying a current through said device of a sufficient amplitude to create a hot conducting channel which expands to the lateral edges of the amorphous element.

Claim 5

The method of claim 3 wherein said current is applied for approximately one microsecond.

Claim 8

The method according to claim 5 wherein the voltage across the element is monitored.

Claim 9

The method according to claim 5 wherein the current through the element is monitored.

Claim 10

The method according to claim 7 wherein said read voltage duration is selected to be at least as long as the average of said first and second state durations.

Claim 11

An amorphous memory having at least two cells comprising: a first cell having electrode means for applying read and write voltages across the cell and amorphous material between said electrode means in a first logic state represented by a high resistance state and a first threshold voltage level for conduction; and a second cell having electrode means for applying read and write voltages across the cell and amorphous material between said electrode means in a second logic state represented by a high resistance state and a second threshold voltage level for conduction lower than said first threshold voltage level; the dimensions of the amorphous material of the cells are sufficiently small to enable both logic states to be altered in the range of microseconds.

Claim 12

An amorphous memory having at least two cells comprising: a first cell having electrode means for applying read and write voltages across the cell and amorphous material between said electrode means in a first logic state represented by a high resistance state and a first threshold voltage level for conduction; and a second cell having electrode means for applying read and write voltages across the cell and amorphous material between said electrode means in a second logic state represented by a high resistance state and a second threshold voltage level for conduction lower than said first threshold voltage level; the dimensions of the amorphous material of the cells are sufficiently small to enable both logic states to be altered in the range of microseconds.

Claim 13

The amorphous memory of claim 9 wherein said first cell has substantially no crystal structure and said second cell has microcrystal structure insufficient to create a low resistance state.

Claim 14

A fast write non-volatile RAM comprising: a first cell of amorphous material in a first logic state represented by a first threshold voltage level for conduction, and substantially no crystal structure, and electrode means for applying read and write voltages across the amorphous material; and a second cell of amorphous material in a second logic state represented by a second threshold voltage level for conduction less than said first threshold voltage level and microcrystal structure insufficient to create a resistance state of an order of magnitude different than the resistance state of said first cell, and electrode means for applying read and write voltages across the amorphous material; the dimensions of the amorphous material of the cell are sufficiently small to enable both logic states to be altered in the range of microseconds.

Claim 15

A fast write non-volatile RAM comprising: a first cell of amorphous material in a first logic state represented by a first threshold voltage level for conduction, and substantially no crystal structure, and electrode means for applying read and write voltages across the amorphous material; and a second cell of amorphous material in a second logic state represented by a second threshold voltage level for conduction less than said first threshold voltage level and microcrystal structure insufficient to create a resistance state of an order of magnitude different than the resistance state of said first cell, and electrode means for applying read and write voltages across the amorphous material; the dimensions of the amorphous material of the cell are sufficiently small to enable both logic states to be altered in the range of microseconds.

Claim 16

The non-volatile RAM of claim 11 wherein said amorphous material is an amorphous semiconductor material.

Claim 17

The non-volatile RAM according to claim 11 wherein the cross-sectional area of said cells is sufficiently small so as to change a cell in a second logic state to a cell in a first logic state by applying a voltage equivalent to a write voltage for approximately one microsecond.