Method of manufacturing a bipolar transistor

Claim 1

A method of manufacturing a semiconductor device consisting of: providing an N type collector layer in a semiconductor wafer having a substantially flat surface; diffusing an N type impurity having a high energy of combination with vacancies and a P type impurity such that a P type base layer is formed in contact with said N type collector layer having a PN junction extending to said surface; and diffusing at least phosphorus which is N type impurity into said P type base layer so that an N type emitter layer is formed which is in contact with said P type base layer having a PN junction extending to said surface and which constitutes a transistor together with said N type collector layer and said P type base layer.

Claim 2

A method of manufacturing a semiconductor device consisting of: providing an N type collector layer in a semiconductor wafer having a substantially flat surface; diffusing an N type impurity having a high energy of combination with vacancies and a P type impurity such that a P type base layer is formed in contact with said N type collector layer having a PN junction extending to said surface; and diffusing at least phosphorus which is N type impurity into said P type base layer so that an N type emitter layer is formed which is in contact with said P type base layer having a PN junction extending to said surface and which constitutes a transistor together with said N type collector layer and said P type base layer.

Claim 3

A method of manufacturing a semiconductor device consisting of: providing an N type collector layer in a semiconductor wafer having a substantially flat surface; diffusing an N type impurity having a high energy of combination with vacancies and boron which is a P type impurity such that a P type base layer is formed in contact with said N type collector layer having an PN junction extending to said surface; and diffusing phosphorus and arsenic which are N type impurities into said P type base layer so that an N type emitter layer is formed which is in contact with said P type base layer having a PN junction extending to said surface and which constitutes a transistor together with said N type collector layer and said P type base layer.

Claim 4

A method of manufacturing a semiconductor device consisting of: providing an N type collector layer in a semiconductor wafer having a substantially flat surface; diffusing an N type impurity having a high energy of combination with vacancies and boron which is a P type impurity such that a P type base layer is formed in contact with said N type collector layer having an PN junction extending to said surface; and diffusing phosphorus and arsenic which are N type impurities into said P type base layer so that an N type emitter layer is formed which is in contact with said P type base layer having a PN junction extending to said surface and which constitutes a transistor together with said N type collector layer and said P type base layer.

Claim 5

A method of manufacturing a semiconductor device comprising: providing an N type collector layer in a silicon semiconductor wafer having a substantially flat surface; covering said N type collector layer with an oxide layer; applying resist to the surface of said oxide layer formed elsewhere run in a region in which a P type base layer is to be formed; implanting an N type impurity having a high energy of combination with vacancies and a P type impurity into said oxide layer using said resist as a mask by ion implantation such that a doped oxide layer is formed; subjecting said doped oxide layer to heat treatment such that a P type base layer is formed in contact with said N type collector layer having a PN junction extending to said surface; and diffusing at least phosphorus which is N type impurity into said P type base layer so that an N type emitter layer is formed which is in contact with said P type base layer having a PN junction extending to said surface and which constitutes a transistor together with said N type collector layer and said P type base layer.

Claim 6

A method of manufacturing a semiconductor device comprising: providing an N type collector layer in a silicon semiconductor wafer having a substantially flat surface; covering said N type collector layer with an oxide layer; applying resist to the surface of said oxide layer formed elsewhere run in a region in which a P type base layer is to be formed; implanting an N type impurity having a high energy of combination with vacancies and a P type impurity into said oxide layer using said resist as a mask by ion implantation such that a doped oxide layer is formed; subjecting said doped oxide layer to heat treatment such that a P type base layer is formed in contact with said N type collector layer having a PN junction extending to said surface; and diffusing at least phosphorus which is N type impurity into said P type base layer so that an N type emitter layer is formed which is in contact with said P type base layer having a PN junction extending to said surface and which constitutes a transistor together with said N type collector layer and said P type base layer.

Claim 7

A method of manufacturing a semiconductor device comprising: providing an N type collector layer in a silicon semiconductor wafer having a substantially flat surface; covering said N type collector layer with an oxide layer; applying resist to the surface of said oxide layer formed elsewhere than in a region in which a P type base layer is to be formed; implanting an N type impurity having a high energy of combination with vacancies and boron which is a P type impurity into said oxide layer by ion implantation with said resist as a mask such that a doped oxide layer is formed; subjecting said doped oxide layer to heat treatment such that a P type base layer is formed in contact with said N type collector layer having a PN junction extending to said surface; and diffusing phosphorus and arsenic which are N type impurities into said P type base layer so that an N type emitter layer is formed which is in contact with said P type base layer having a PN junction extending to said surface and which constitutes a transistor together with said N type collector layer and said P type base layer.

Claim 8

A method of manufacturing a semiconductor device comprising: providing an N type collector layer in a silicon semiconductor wafer having a substantially flat surface; covering said N type collector layer with an oxide layer; applying resist to the surface of said oxide layer formed elsewhere than in a region in which a P type base layer is to be formed; implanting an N type impurity having a high energy of combination with vacancies and boron which is a P type impurity into said oxide layer by ion implantation with said resist as a mask such that a doped oxide layer is formed; subjecting said doped oxide layer to heat treatment such that a P type base layer is formed in contact with said N type collector layer having a PN junction extending to said surface; and diffusing phosphorus and arsenic which are N type impurities into said P type base layer so that an N type emitter layer is formed which is in contact with said P type base layer having a PN junction extending to said surface and which constitutes a transistor together with said N type collector layer and said P type base layer.

Claim 9

A method of manufacturing a semiconductor device which comprises the steps of: providing an N type collector layer in an N type semiconductor wafer having a substantially flat surface; coating said N type collector layer with a first oxide film layer; implanting boron and an N type impurity having a high energy of combination with vacancies into a controlled region of said first oxide film layer; diffusing boron and said N type impurity from said first oxide film layer into said N type collector layer such that a P type base layer in contact with said N type collector layer is formed having a PN junction extending to said surface; removing said first oxide film layer from said semiconductor wafer; covering said N type collector layer and said P type base layer with a second oxide film layer; forming an opening in said second oxide film layer; and diffusing phosphorus and arsenic which are N type impurities through said opening in said second oxide layer into said P type base layer such that an N type emitter layer is formed which is in contact with said P type base layer having a PN junction extending to said surface and which constitutes a transistor together with said N type collector layer and said P type base layer.

Claim 10

A method of manufacturing a semiconductor device which comprises the steps of: providing an N type collector layer in an N type semiconductor wafer having a substantially flat surface; coating said N type collector layer with a first oxide film layer; implanting boron and an N type impurity having a high energy of combination with vacancies into a controlled region of said first oxide film layer; diffusing boron and said N type impurity from said first oxide film layer into said N type collector layer such that a P type base layer in contact with said N type collector layer is formed having a PN junction extending to said surface; removing said first oxide film layer from said semiconductor wafer; covering said N type collector layer and said P type base layer with a second oxide film layer; forming an opening in said second oxide film layer; and diffusing phosphorus and arsenic which are N type impurities through said opening in said second oxide layer into said P type base layer such that an N type emitter layer is formed which is in contact with said P type base layer having a PN junction extending to said surface and which constitutes a transistor together with said N type collector layer and said P type base layer.

Claim 11

A method of manufacturing a semiconductor device which comprises the steps of: providing an N type collector layer in an N type semiconductor wafer having a substantially flat surface; coating said N type collector layer with a first oxide film layer; implanting an N type impurity having a high energy of combination with vacancies into a controlled region of said first oxide film layer; diffusing said N type impurity from said first oxide layer into said N type collector layer; implanting boron into said controlled region of said first oxide film layer; diffusing boron from said first oxide layer into said N type collector layer such that a P type base layer in contact with said N type collector layer is formed having a PN junction extending to said surface; removing said first oxide layer from said semiconductor wafer; covering said N type collector layer and said P type base layer with a second oxide film layer; forming an opening in said second oxide film layer; diffusing phosphorus and arsenic which are N type impurities through said opening in said second oxide layer into said P type base layer such that an N type emitter layer is formed which is in contact with said P type base layer having a PN junction extending to said surface and which constitutes a transistor together with said N type collector layer and said P type base layer.

Claim 12

A method of manufacturing a semiconductor device which comprises the steps of: providing an N type collector layer in an N type semiconductor wafer having a substantially flat surface; coating said N type collector layer with a first oxide film layer; implanting an N type impurity having a high energy of combination with vacancies into a controlled region of said first oxide film layer; diffusing said N type impurity from said first oxide layer into said N type collector layer; implanting boron into said controlled region of said first oxide film layer; diffusing boron from said first oxide layer into said N type collector layer such that a P type base layer in contact with said N type collector layer is formed having a PN junction extending to said surface; removing said first oxide layer from said semiconductor wafer; covering said N type collector layer and said P type base layer with a second oxide film layer; forming an opening in said second oxide film layer; diffusing phosphorus and arsenic which are N type impurities through said opening in said second oxide layer into said P type base layer such that an N type emitter layer is formed which is in contact with said P type base layer having a PN junction extending to said surface and which constitutes a transistor together with said N type collector layer and said P type base layer.

Claim 13

A method of manufacturing a semiconductor device as recited in any of claims 3, 4, 5 or 6, wherein: said N type impurity having a high energy of combination with vacancies is arsenic.

Claim 14

A method of manufacturing a semiconductor device as recited in any of claims 3, 4, 5, or 6 wherein: said N type impurity having a high energy of combination with vacancies is antimony.