Method of producing a semiconductor integrated circuit BI-MOS device

Claim 1

A method of producing a BI-MOS semiconductor integrated device, comprising the steps of: forming a plurality of epitaxial regions of a first conductivity type separated by oxide regions on a substrate of a second conductivity type; forming a first oxide film on said epitaxial regions so as to provide for an aperture over a first portion of a first epitaxial region and so as to cover a second epitaxial region; depositing a silicon film on said first oxide film, on said oxide regions and through said aperture on said first portion of said first epitaxial region; forming a base leading electrode region above said first epitaxial region and a gate electrode region above said second epitaxial region by diffusing second conductivity type impurities into said silicon film; patterning said silicon film by removing portions thereof; forming a base lower leading region below said base leading electrode region by diffusion of impurities from said base leading electrode region into said base lower leading region; forming an oxide insulation film on said base leading electrode region, on said gate electrode region, and on said first and second epitaxial regions; forming a resist film over a second portion of said first epitaxial region; forming a bipolar element base layer in said first epitaxial region, and a MOS element source layer and a MOS element drain layer in said second epitaxial region by diffusion of second conductivity type impurities into said epitaxial regions, wherein said resist film masks said first epitaxial region so that a collector leading region may be formed and wherein said gate electrode region acts as a mask so that said source layer and said drain layer are self-aligned; forming a passivation film at least over said oxide insulation layer so as to provide for emitter and collector apertures; forming an emitter leading layer and a collector leading layer by diffusion of first conductivity type impurities into said first epitaxial region; forming contact apertures in said passivation film and in said oxide insulation layer; and forming a base electrode, an emitter electrode, a collector electrode, a source electrode, and a drain electrode in said contact apertures.

Claim 2

A method of producing a BI-MOS semiconductor integrated device, comprising the steps of: forming a plurality of epitaxial regions of a first conductivity type separated by oxide regions on a substrate of a second conductivity type; forming a first oxide film on said epitaxial regions so as to provide for an aperture over a first portion of a first epitaxial region and so as to cover a second epitaxial region; depositing a silicon film on said first oxide film, on said oxide regions and through said aperture on said first portion of said first epitaxial region; forming a base leading electrode region above said first epitaxial region and a gate electrode region above said second epitaxial region by diffusing second conductivity type impurities into said silicon film; patterning said silicon film by removing portions thereof; forming a base lower leading region below said base leading electrode region by diffusion of impurities from said base leading electrode region into said base lower leading region; forming an oxide insulation film on said base leading electrode region, on said gate electrode region, and on said first and second epitaxial regions; forming a resist film over a second portion of said first epitaxial region; forming a bipolar element base layer in said first epitaxial region, and a MOS element source layer and a MOS element drain layer in said second epitaxial region by diffusion of second conductivity type impurities into said epitaxial regions, wherein said resist film masks said first epitaxial region so that a collector leading region may be formed and wherein said gate electrode region acts as a mask so that said source layer and said drain layer are self-aligned; forming a passivation film at least over said oxide insulation layer so as to provide for emitter and collector apertures; forming an emitter leading layer and a collector leading layer by diffusion of first conductivity type impurities into said first epitaxial region; forming contact apertures in said passivation film and in said oxide insulation layer; and forming a base electrode, an emitter electrode, a collector electrode, a source electrode, and a drain electrode in said contact apertures.