Patent US4766655A successfully refreshed from Google Patents.
US4766655A
Expired / Lapsed
US
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Method for fabricating a compensated silicon pressure sensing device
Assignee: Texas Instruments Tucson Corp
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Filing: 1986-10-24
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Granted: 1988-08-30
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Expires: 2006-10-24
Abstract
Abstract A pressure sensing device including a single crystal of silicon configured to have a diaphram portion, a frame portion and associated circuitry formed on the crystal is described. Piezo-resistive elements on the boundary of the frame and the diaphram portions of the crystal respond to changes in pressure. The piezo-resistive elements, associated elements, and connecting conducting paths are formed by thin film and/or doping techniques to provide a monolithically integrated circuit. The elements are passive and require only application of input voltages and detection of output signals to provide an operative component. Trimmable resistors are provided for compensation and resistive adjustment, and at least one resistive element provides temperature compensation.
Inventors
- 👤 Robert E. Hickox
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 21:44
CPC Classifications
G; G01; G01L; G01L9/00; G01L9/0041; G01L9/0051; G01L9/0052; G01L9/0054; G01L9/02; G01L9/06; G01L9/065; Y; Y10; Y10S; Y10S73/00; Y10S73/04; Y10T; Y10T29/00; Y10T29/42; Y10T29/49; Y10T29/49002; Y10T29/49082; Y10T29/49099; Y10T29/49103
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
129 words
A method for fabricating a pressure transducer including a silicon piezo-resistive bridge circuit with a pair of input terminals and a pair of output terminals, comprising the steps of: providing a single crystal silicon substrate including a diaphragm region containing piezo-resistive silicon bridge elements; forming a first doped silicon resistive means having a positive temperature coefficient in said single crystal substrate; depositing low-temperature coefficient trimmable thin-film resistive elements over said silicon substrate; coupling said piezo-resistive silicon bridge elements and said trimmable thin-film resistive elements to form a bridge circuit having a silicon bridge element and trimmable thin-film resistive means in each arm; and serially coupling one of said trimmable thin-film resistive elements and said first doped silicon resistive means across said pair of output terminals of said bridge circuit.
Claim 2
Independent Claim
129 words
A method for fabricating a pressure transducer including a silicon piezo-resistive bridge circuit with a pair of input terminals and a pair of output terminals, comprising the steps of: providing a single crystal silicon substrate including a diaphragm region containing piezo-resistive silicon bridge elements; forming a first doped silicon resistive means having a positive temperature coefficient in said single crystal substrate; depositing low-temperature coefficient trimmable thin-film resistive elements over said silicon substrate; coupling said piezo-resistive silicon bridge elements and said trimmable thin-film resistive elements to form a bridge circuit having a silicon bridge element and trimmable thin-film resistive means in each arm; and serially coupling one of said trimmable thin-film resistive elements and said first doped silicon resistive means across said pair of output terminals of said bridge circuit.
Claim 3
Dependent Claim
44 words
The method according to claim 1, further comprising forming a second doped silicon resistive means having a positive temperature coefficient in said single crystal silicon substrate, and coupling said second doped silicon resistive means across said pair of input terminals of said bridge circuit.
Claim 4
Dependent Claim
31 words
The method according to claim 1, further including adjusting the values of said trimmable thin film resistive elements to balance said bridge and to determine the output impedance of said bridge.
Claim 5
Dependent Claim
31 words
The method according to claim 1, further including adjusting the values of said trimmable thin film resistive elements to balance said bridge and to determine the output impedance of said bridge.
Claim 6
Dependent Claim
30 words
The method of claim 1 further including the step of adjusting the sensitivity of said bridge circuit by trimming a thin-film resistor serially coupled with said pair of input terminals.
Claim 7
Dependent Claim
38 words
The method of claim 1 further including the step of forming a second resistive element across input terminals of said bridge circuit, said second resistive element having a temperature coefficient compensating for a temperature coefficient of said bridge.
Claim 8
Independent Claim
80 words
A method for fabricating a monolithic pressure transducer including silicon piezo-resistors connected in a bridge circuit with a pair of input terminals and a pair of output terminals, comprising the steps of: adjusting the balance of said bridge circuit by trimming thin-film resistors in series with said piezo-resistors; and providing doped silicon resistive means coupled across one of said pair of said input or said output terminals for compensating the decrease in piezo-resistive effect of said piezo-resistors with increasing temperature.
Claim 9
Independent Claim
80 words
A method for fabricating a monolithic pressure transducer including silicon piezo-resistors connected in a bridge circuit with a pair of input terminals and a pair of output terminals, comprising the steps of: adjusting the balance of said bridge circuit by trimming thin-film resistors in series with said piezo-resistors; and providing doped silicon resistive means coupled across one of said pair of said input or said output terminals for compensating the decrease in piezo-resistive effect of said piezo-resistors with increasing temperature.
Claim 10
Dependent Claim
35 words
The method of claim 1, further comprising adjusting the terminal impedance of said pressure transducer by trimming a thin-film resistor coupled across one of said pair of input terminals or said pair of output terminals.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-08-30 | 1992-02-29 | 1992-08-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-08-30 | 1996-02-29 | 1996-08-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-08-30 | 2000-02-29 | 2000-08-30 | $7700.00 | Window Closed / Lapsed |