← Back to Patent Explorer
US4333349A Expired / Lapsed US ⏱️ 0.0 years remaining

Binary balancing apparatus for semiconductor transducer structures

Assignee: Kulite Semiconductor Products Inc
•
Filing: 1980-10-06
•
Granted: 1982-06-08
•
Expires: 2000-10-06
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract There is disclosed a balancing network for a piezoresistive semiconductor bridge configuration. The balancing network comprises a plurality of series resistors arranged in series with the sensing elements in the bridge configuration. Each resistor differs from the previous one according to a power of two to form a binary ladder arrangement. The individual resistors are associated with terminals to allow the transducer manufacturer to selectively short one or more resistors to provide zero balance compensation. The resistors are located on the nonactive portion of the semiconductor substrate and are fabricated by the same techniques employed for fabrication of the semiconductor piezoresistive sensing elements to assure temperature tracking of the unit with the desired temperature operating range.

Inventors

  • 👤 Joseph R. Mallon
  • 👤 Anthony D. Kurtz

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 22:34
CPC Classifications
G; G01; G01L; G01L9/00; G01L9/0041; G01L9/0051; G01L9/0052; G01L9/0054; G01L1/00; G01L1/20; G01L1/22; G01L1/2268; G01L1/2281; G01L9/02; G01L9/06

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 90 words
A pressure transducer apparatus containing one or more piezoresistive elements formed by an integrated circuit technique arranged in a bridge array on a force responsive member, the combination therewith comprising: an array of resistive elements formed by said integrated circuit technique simultaneously with said piezoresistive elements and arranged in a series relationship with respect to said piezoresistive elements forming said bridge array and means coupled to said array for selectively bypassing one or more of said resistive elements to obtain an effective adjustment of the resistance of said piezoresistive element.
Claim 2
Dependent Claim 90 words
A pressure transducer apparatus containing one or more piezoresistive elements formed by an integrated circuit technique arranged in a bridge array on a force responsive member, the combination therewith comprising: an array of resistive elements formed by said integrated circuit technique simultaneously with said piezoresistive elements and arranged in a series relationship with respect to said piezoresistive elements forming said bridge array and means coupled to said array for selectively bypassing one or more of said resistive elements to obtain an effective adjustment of the resistance of said piezoresistive element.
Claim 3
Dependent Claim 36 words
The transducer according to claim 1 wherein said array of piezoresistors is a Wheatstone bridge configuration wherein said resistive array operates to adjust the zero balance when one or more of said resistive elements are bypassed.
Claim 4
Dependent Claim 17 words
The transducer according to claim 1 wherein bypassing resistive elements effects the force sensitivity of said bridge.
Claim 5
Dependent Claim 29 words
The transducer according to claim 1 wherein said resistive array comprises a plurality of resistors arranged in a magnitude to differ one from the other in a binary format.
Claim 6
Dependent Claim 127 words
In an integrated semiconductor transducer arrangement of the type employing a bridge configuration of integrated piezoresistive sensing elements, with said elements deposited on a semiconductor substrate by an integrated circuit technique, the combination therewith of balancing apparatus for providing a zero shift and balance for said bridge configuration, comprising: a binary resistive ladder comprising a plurality of resistors, each one differing in value from each other by a factor of two and arranged in series with at least one section of said bridge, and means for selectively bypassing desired ones of said resistors according to an output from said transducer upon application thereto of a zero reference pressure, said resistive ladder deposited on said diaphragm according to the same technique as employed for deposition of said piezoresistors.
Claim 7
Dependent Claim 127 words
In an integrated semiconductor transducer arrangement of the type employing a bridge configuration of integrated piezoresistive sensing elements, with said elements deposited on a semiconductor substrate by an integrated circuit technique, the combination therewith of balancing apparatus for providing a zero shift and balance for said bridge configuration, comprising: a binary resistive ladder comprising a plurality of resistors, each one differing in value from each other by a factor of two and arranged in series with at least one section of said bridge, and means for selectively bypassing desired ones of said resistors according to an output from said transducer upon application thereto of a zero reference pressure, said resistive ladder deposited on said diaphragm according to the same technique as employed for deposition of said piezoresistors.
Claim 8
Dependent Claim 55 words
The combination according to claim 5 wherein said substrate constitutes a force responsive diaphragm with a first portion of said diaphragm adapted to deflect upon application of a force thereto, and a second portion restrained from deflection with said piezoresistors deposited on said first portion and said binary resistive ladder deposited on said second portion.
Claim 9
Dependent Claim 67 words
The combination according to claim 5 wherein said resistive ladder comprises at least four resistors in series, with the first resistor having a value of R, R equal to n ohms, where n is a positive number with a second resistor having a value of 2R, with a third resistor having a value of 4R, and with at least said fourth resistor having a value of 8R.
Claim 10
Dependent Claim 46 words
The combination according to claim 5 wherein said means for bypassing desired ones of said resistors includes a separate terminal located between each resistor in said series to enable a shorting conductor to be emplaced between said terminals for bypassing any desired one of said resistors.
Claim 11
Dependent Claim 11 words
The combination according to claim 6 wherein said diaphragm is circular.
Claim 12
Dependent Claim 11 words
The combination according to claim 6 wherein said diaphragm is rectangular.
Claim 13
Dependent Claim 32 words
The combination according to claim 5 wherein said section of said bridge is the output section of said bridge from which an output voltage level according to an applied pressure is obtained.
Claim 14
Dependent Claim 28 words
The combination according to claim 5 wherein said section of said bridge is the input section of said bridge to which a source of biasing potential is applied.
Claim 15
Dependent Claim 32 words
The combination according to claim 5 wherein said section of said bridge is an arm of said bridge wherein said resistive ladder is in series with at least one of said piezoresistors.
Claim 16
Dependent Claim 15 words
The combination according to claim 5 wherein said integrated circuit technique is a diffusion process.
Claim 17
Dependent Claim 140 words
A transducer apparatus, comprising in combination: an integrated circuit transducer assembly, including a semiconductor substrate manifesting a force sensitive diaphragm having an active area adapted to deflect upon application of a force to said diaphragm and a second area relatively insensitive to deflection upon application of a force thereto, four piezoresistive elements forming a bridge array deposited within said active area by an integrated circuit technique, with at least two of said elements connected in series with a binary resistive ladder comprising a plurality of integrated resistors deposited by the same integrated circuit technique on said substrate within said second area, each of said resistors differing in value from each other by a factor of two, and means coupled to said resistors for selecting desired ones of said resistors whereby said selection determines the zero balance of said transducer assembly.
Claim 18
Dependent Claim 140 words
A transducer apparatus, comprising in combination: an integrated circuit transducer assembly, including a semiconductor substrate manifesting a force sensitive diaphragm having an active area adapted to deflect upon application of a force to said diaphragm and a second area relatively insensitive to deflection upon application of a force thereto, four piezoresistive elements forming a bridge array deposited within said active area by an integrated circuit technique, with at least two of said elements connected in series with a binary resistive ladder comprising a plurality of integrated resistors deposited by the same integrated circuit technique on said substrate within said second area, each of said resistors differing in value from each other by a factor of two, and means coupled to said resistors for selecting desired ones of said resistors whereby said selection determines the zero balance of said transducer assembly.
Claim 19
Dependent Claim 16 words
The transducer apparatus according to claim 15 wherein said integrated circuit technique is a diffusion process.
Claim 20
Dependent Claim 13 words
The transducer according to claim 15 wherein said substrate is fabricated from silicon.
Claim 21
Dependent Claim 15 words
The transducer according to claim 15 wherein said bridge array is a Wheatstone bridge array.
Claim 22
Dependent Claim 52 words
The transducer according to claim 15 wherein said means for selecting desired ones of said resistors includes a separate terminal area located between each resistor in said series to enable a shorting conductor to be emplaced between said terminals for bypassing any desired one of said resistors to thereby accomplish said selection.

References Cited (Backward Citations)

US3245252A Cited
US3646815A Cited
US3873956A Cited
US3886799A Cited
US3900811A Cited
US4016644A Cited
SU613219A1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-06-07 1985-12-07 1986-06-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-06-07 1989-12-07 1990-06-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-06-07 1993-12-07 1994-06-08 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag