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US4754371A Expired / Lapsed US ⏱️ 0.0 years remaining

Large scale integrated circuit package

Assignee: NEC Corp
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Filing: 1985-04-18
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Granted: 1988-06-28
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Expires: 2005-04-18
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Abstract

Abstract A large scale integrated circuit package is described wherein insulating layers of an organic material are provided between wiring layers to reduce the characteristic impedance of signal wiring. To avoid deformation of the organic insulating layers and subsequent damage to wiring layers, leads for connecting the circuits of an integrated circuit chip to electrode pads are mechanically connected to the electrode pads on an upper layer of organic insulating material by a gold-tin eutectic alloy.

Inventors

  • 👤 Mitsuru Nitta
  • 👤 Tatsuo Satoh
  • 👤 Tatsuo Inoue

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 15:31
CPC Classifications
H; H10; H10W; H10W99/00; H10W44/00; H10W44/601; H10W70/00; H10W70/60; H10W70/611; H10W70/67; H10W70/68; H10W70/685

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 186 words
A large scale integrated circuit package, comprising: a ceramic layer section having first and second surfaces and including at least one power supply wiring layer and at least one first grounding wiring layer; a plurality of terminals provided on the first surface of said ceramic layer section; a wiring layer section disposed on the second surface of said ceramic layer section having at least one signal wiring layer provided with a desired wiring pattern sandwiched between two additional wiring layers, said two additional wiring layers respectively being one of a power supply wiring layer and a grounding wiring layer, and insulating layers separating said at least one signal wiring layer from said two additional wiring layers; at least one integrated circuit chip having a plurality of leads and mounted on an upper insulating layer over said at least one signal wiring layer; and a plurality of electrodes disposed on said upper insulating layer electrically connected to said at least one signal layer and leads connecting said electrodes to circuits of said integrated chip, the connection between said electrodes and said leads being a gold-tin eutectic alloy.
Claim 2
Dependent Claim 186 words
A large scale integrated circuit package, comprising: a ceramic layer section having first and second surfaces and including at least one power supply wiring layer and at least one first grounding wiring layer; a plurality of terminals provided on the first surface of said ceramic layer section; a wiring layer section disposed on the second surface of said ceramic layer section having at least one signal wiring layer provided with a desired wiring pattern sandwiched between two additional wiring layers, said two additional wiring layers respectively being one of a power supply wiring layer and a grounding wiring layer, and insulating layers separating said at least one signal wiring layer from said two additional wiring layers; at least one integrated circuit chip having a plurality of leads and mounted on an upper insulating layer over said at least one signal wiring layer; and a plurality of electrodes disposed on said upper insulating layer electrically connected to said at least one signal layer and leads connecting said electrodes to circuits of said integrated chip, the connection between said electrodes and said leads being a gold-tin eutectic alloy.
Claim 3
Dependent Claim 21 words
A large scale integrated circuit package as claimed in claim 1, wherein said insulating layers are made of an organic material.
Claim 4
Dependent Claim 25 words
A large scale integrated circuit package as claimed in claim 2, wherein said material is selected from the group consisting of polyimide, epoxy and Teflon.
Claim 5
Dependent Claim 29 words
A large scale integrated circuit package as claimed in claim 1, and further comprising an organic insulating layer disposed between said ceramic layer section and said wiring layer section.
Claim 6
Dependent Claim 23 words
A large scale integrated circuit package as claimed in claim 1, wherein said signal wiring layer is made of either gold or copper.
Claim 7
Dependent Claim 22 words
A large scale integrated circuit package as claimed in claim 1, wherein the second surface of said ceramic layer section is polished.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-06-28 1991-12-28 1992-06-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-06-28 1995-12-28 1996-06-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-06-28 1999-12-28 2000-06-28 $7700.00 Window Closed / Lapsed

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