Integrated circuit manufacturing process

Claim 2

A process for manufacturing an integrated circuit in which there are multiple patterned layers of thin film materials on a semiconductor wafer, including the steps of: providing a material layer overlying the semiconductor wafer surface; providing a photoresist layer over the material layer; exposing the photoresist to change its characteristics; removing portions of the photoresist to provide uncovered portions of the material layer; removing the uncovered portions of the material layer; and thereafter conditioning the wafer surface to provide a thin oxide layer thereon by rinsing it with a purified water solution containing at least 0.01 ppm ozone.

Claim 3

A process as described in claim 1, wherein between the steps of removing portions of the photoresist and removing the uncovered portions of the material layer, there is a step of conditioning the item by rinsing it with a purified water solution containing at least 0.01 ppm ozone.

Claim 4

A process as described in claim 1, wherein said purified water solution contains between 0.02 and 0.09 ppm ozone.

Claim 5

A process as described in claim 1, in which said material layer has a thickness of between 20 and 400 angstroms.

Claim 6

A process as described in claim 1, wherein said material layer comprises silicon nitride.

Claim 7

A process as described in claim 1, wherein said material layer comprises a thick film oxide.

Claim 8

A process as described in claim 1, in which the semiconductor material is silicon and wherein when the uncovered portion of the material layer is removed, bare silicon is exposed prior to the conditioning step, whereby the bare silicon is conditioned to provide a thin oxide layer thereon by rinsing it with said purified water containing ozone.

Claim 9

A process as described in claim 1, including the following steps after the conditioning step: providing a second material layer over the conditioned item; providing a photoresist layer over the second material layer; exposing the photoresist to change its characteristics; removing portions of the photoresist to provide uncovered portions of the second material layer; removing the uncovered portions of the second material layer; and thereafter conditioning the item by rinsing it with a purified water solution containing at least 0.01 ppm ozone.

Claim 10

A process for manufacturing an integrated circuit in which there are multiple patterned layers of thin film materials on a silicon wafer, including the steps of: providing a material layer overlying the silicon wafer surface; providing a photoresist layer over the material layer; exposing the photoresist to change its characteristics; removing portions of the photoresist to provide uncovered portions of the material layer; thereafter conditioning the item by rinsing it with a purified water solution containing between 0.02 and 0.09 ppm ozone; thereafter removing the uncovered portions of the material layer, to expose bare silicon; thereafter conditioning the bare silicon to provide a thin oxide layer thereon by rinsing it with a purified water solution containing between 0.02 and 0.09 ppm ozone.

Claim 11

A process for manufacturing an integrated circuit in which there are multiple patterned layers of thin film materials on a silicon wafer, including the steps of: providing a material layer overlying the silicon wafer surface; providing a photoresist layer over the material layer; exposing the photoresist to change its characteristics; removing portions of the photoresist to provide uncovered portions of the material layer; thereafter conditioning the item by rinsing it with a purified water solution containing between 0.02 and 0.09 ppm ozone; thereafter removing the uncovered portions of the material layer, to expose bare silicon; thereafter conditioning the bare silicon to provide a thin oxide layer thereon by rinsing it with a purified water solution containing between 0.02 and 0.09 ppm ozone.

Claim 12

A process as described in claim 9, including the following steps after the step of conditioning the bare silicon: providing a second material layer over the conditioned item; providing a photoresist layer over the second material layer; exposing the photoresist to change its characteristics; removing portions of the photoresist to provide uncovered portions of the second material layer; removing the uncovered portions of the second material layer; and thereafter conditioning the item by rinsing it with a purified water solution containing between 0.02 and 0.09 ppm ozone.

Claim 13

A process for manufacturing an integrated circuit in which there are multiple patterned layers of thin film materials on a semiconductor wafer, including the steps of: applying layers of materials over the semiconductor wafer surface; applying a photoresist layer; removing selected portions of the photoresist layer; removing portions of the materials from the wafer surface between the material applying steps; prior to a material applying step, conditioning the wafer surface to provide a thin oxide layer thereon by rinsing it with a purified water solution containing at least 0.01 ppm ozone.

Claim 14

A process for manufacturing an integrated circuit in which there are multiple patterned layers of thin film materials on a semiconductor wafer, including the steps of: applying layers of materials over the semiconductor wafer surface; applying a photoresist layer; removing selected portions of the photoresist layer; removing portions of the materials from the wafer surface between the material applying steps; prior to a material applying step, conditioning the wafer surface to provide a thin oxide layer thereon by rinsing it with a purified water solution containing at least 0.01 ppm ozone.

Claim 15

A process as described in claim 11, wherein said purified water solution contains between 0.02 and 0.09 ppm ozone.