Method of fabricating a junction field effect transistor

Claim 1

The method of fabricating a junction field effect transistor comprising providing a body of semiconductor material including a substrate of semiconductor material of one conductivity type of relatively low resistivity and a layer of semiconductor material of the one conductivity type of relatively high resistivity contiguous said substrate, said layer having a surface at a surface of the body; introducing conductivity type imparting material of the one conductivity type into a plurality of spaced-apart source regions in said layer at said surface; forming a first undercut mask on said surface having a plurality of openings, each opening exposing a portion of said surface intermediate between two adjacent source regions, said first undercut mask being undercut at each opening so that the opening is wider at said surface than at a distance from the surface; introducing conductivity type imparting material of the opposite conductivity type into a plurality of gate regions in said layer at said surface defined by the plurality of openings in said first undercut mask; depositing dielectric material onto said surface through the openings in said first undercut mask so as to form a plurality of temporary gate members, each being wider at its base contiguous with said surface than at its uppermost portion spaced from said surface; removing said first undercut mask to expose said surface except the portions thereof occupied by the temporary gate members; depositing a layer of adherent, nonconductive, protective material on the exposed surface and on the temporary gate members; depositing masking material on said layer of adherent, nonconductive, protective material; removing masking material to expose the portions of the layer of adherent, nonconductive, protective material overlying the uppermost portions of the temporary gate members; removing said temporary gate members and portions of the layer of adherent, nonconductive, protective material adjacent thereto so that the remaining masking material forms a second undercut mask having a plurality of openings, each opening exposing a portion of the surface of one of said gate regions, said second undercut mask being undercut at each opening so that the opening is wider at said surface than at a distance from the surface; depositing a conductive material for making ohmic contact to semiconductor material of the opposite conductivity type onto a portion of the exposed surface of each of said gate regions defined by the openings in the second undercut mask to form a plurality of gate contact members; removing the second undercut mask; forming a plurality of openings in said layer of adherent, nonconductive, protective material, each opening exposing an area of the surface of a source region; depositing a conductive material for making ohmic contact to said semiconductor material of the one conductivity type onto a portion of the exposed surface area of each of said source regions to form a plurality of source contact members; and applying conductive material to form a source interconnection in contact with said source contact members and to form a gate interconnection in contact with said gate contact members.

Claim 2

The method of fabricating a junction field effect transistor comprising providing a body of semiconductor material including a substrate of semiconductor material of one conductivity type of relatively low resistivity and a layer of semiconductor material of the one conductivity type of relatively high resistivity contiguous said substrate, said layer having a surface at a surface of the body; introducing conductivity type imparting material of the one conductivity type into a plurality of spaced-apart source regions in said layer at said surface; forming a first undercut mask on said surface having a plurality of openings, each opening exposing a portion of said surface intermediate between two adjacent source regions, said first undercut mask being undercut at each opening so that the opening is wider at said surface than at a distance from the surface; introducing conductivity type imparting material of the opposite conductivity type into a plurality of gate regions in said layer at said surface defined by the plurality of openings in said first undercut mask; depositing dielectric material onto said surface through the openings in said first undercut mask so as to form a plurality of temporary gate members, each being wider at its base contiguous with said surface than at its uppermost portion spaced from said surface; removing said first undercut mask to expose said surface except the portions thereof occupied by the temporary gate members; depositing a layer of adherent, nonconductive, protective material on the exposed surface and on the temporary gate members; depositing masking material on said layer of adherent, nonconductive, protective material; removing masking material to expose the portions of the layer of adherent, nonconductive, protective material overlying the uppermost portions of the temporary gate members; removing said temporary gate members and portions of the layer of adherent, nonconductive, protective material adjacent thereto so that the remaining masking material forms a second undercut mask having a plurality of openings, each opening exposing a portion of the surface of one of said gate regions, said second undercut mask being undercut at each opening so that the opening is wider at said surface than at a distance from the surface; depositing a conductive material for making ohmic contact to semiconductor material of the opposite conductivity type onto a portion of the exposed surface of each of said gate regions defined by the openings in the second undercut mask to form a plurality of gate contact members; removing the second undercut mask; forming a plurality of openings in said layer of adherent, nonconductive, protective material, each opening exposing an area of the surface of a source region; depositing a conductive material for making ohmic contact to said semiconductor material of the one conductivity type onto a portion of the exposed surface area of each of said source regions to form a plurality of source contact members; and applying conductive material to form a source interconnection in contact with said source contact members and to form a gate interconnection in contact with said gate contact members.