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US4532004A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing a semiconductor device

Assignee: Toshiba Corp
•
Filing: 1984-07-31
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Granted: 1985-07-30
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Expires: 2004-07-31
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Abstract

Abstract A method of manufacturing a GaAs FET is disclosed. In this manufacturing method, a protection film is formed on a GaAs substrate and a dummy gate electrode is formed thereon. A channel length setting film is isotropically formed on the dummy gate electrode to have a constant thickness. Then, an impurity is ion-implanted in the channel length setting film. Thereafter, the channel length setting film is removed. An etching preventive film is anisotropically formed along a substantially vertical direction with respect to the GaAs substrate. The dummy gate electrode is etched using the etching preventive film as a mask so as to form a first opening in the etching preventive film. Then, a second opening is formed in the region of the protection film corresponding to the region in which the dummy gate electrode was present. A gate electrode is formed to be in contact with the GaAs substrate through the first and second openings.

Inventors

  • 👤 Tatsuo Akiyama
  • 👤 Yutaka Koshino
  • 👤 Shunichi Hiraki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 13:20
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/061; H10D30/0612; H10D30/0614; H10D30/80; H10D30/87; H10D64/00; H10D64/01; H10D64/012; H10D64/0124; H10D64/0125; H10P; H10P76/00; H10P76/40

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 200 words
A method of manufacturing a semiconductor device, comprising the steps of: forming an insulating protection film on a semiconductor substrate; forming a dummy gate electrode on said protection film; forming a distance setting film having a constant thickness on an exposed surface of said protection film and upper and side surfaces of said dummy gate electrode; ion-implanting an impurity in said semiconductor substrate using said dummy gate electrode and regions of said distance setting film which are respectively formed on the upper and side surfaces of said dummy gate electrode as a mask so as to a form source and drain region, respectively; etching said distance setting film; forming an etching preventive film on an exposed surface of said protection film; etching said dummy gate electrode using said etching preventive film formed on said protection film as a mask so as to form a first opening; etching a region of said protection film corresponding to a region in which said dummy gate electrode was present so as to form a second opening thereby exposing a portion of said semiconductor substrate; and forming a metal gate electrode to be in contact with said semiconductor substrate through said first and second openings.
Claim 2
Independent Claim 200 words
A method of manufacturing a semiconductor device, comprising the steps of: forming an insulating protection film on a semiconductor substrate; forming a dummy gate electrode on said protection film; forming a distance setting film having a constant thickness on an exposed surface of said protection film and upper and side surfaces of said dummy gate electrode; ion-implanting an impurity in said semiconductor substrate using said dummy gate electrode and regions of said distance setting film which are respectively formed on the upper and side surfaces of said dummy gate electrode as a mask so as to a form source and drain region, respectively; etching said distance setting film; forming an etching preventive film on an exposed surface of said protection film; etching said dummy gate electrode using said etching preventive film formed on said protection film as a mask so as to form a first opening; etching a region of said protection film corresponding to a region in which said dummy gate electrode was present so as to form a second opening thereby exposing a portion of said semiconductor substrate; and forming a metal gate electrode to be in contact with said semiconductor substrate through said first and second openings.
Claim 3
Dependent Claim 26 words
A method according to claim 1, wherein the step of forming said second opening is performed by continuing the step of etching said dummy gate electrode.
Claim 4
Dependent Claim 15 words
A method according to claim 1, wherein said semiconductor substrate is a gallium arsenide substrate.
Claim 5
Dependent Claim 21 words
A method according to claim 1, wherein said protection film is a silicon nitride film formed by plasma chemical vapor deposition.
Claim 6
Dependent Claim 22 words
A method according to claim 1, wherein said distance setting film is a silicon oxide film formed by plasma chemical vapor deposition.
Claim 7
Dependent Claim 22 words
A method according to claim 1, wherein said etching preventive film is a silicon oxide film formed by sputtering chemical vapor deposition.

References Cited (Backward Citations)

US4351099A Cited
US4347654A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-07-29 1989-01-28 1989-07-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-07-29 1993-01-28 1993-07-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-07-29 1997-01-28 1997-07-30 $7700.00 Window Closed / Lapsed

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