Patent US4718042A successfully refreshed from Google Patents.
US4718042A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Non-destructive method and circuit to determine the programmability of a one time programmable device
Assignee: MagnaChip Semiconductor Ltd
•
Filing: 1985-12-23
•
Granted: 1988-01-05
•
Expires: 2005-12-23
Abstract
Abstract In a one time programmable memory device having a memory cell, a programmable device in the memory cell having a high initial resistance, a user readable circuit for reading the condition of the programmable device, and capacitance coupled with the initial resistance and having an RC time constant therewith, a circuit and its method for non-destructively testing the programmability of the programmable device. A switch device is included in the user readable circuit and is connected to the capacitance. The switch device has a first condition for discharging the capacitance and a second condition for allowing the capacitance to charge through the programmable device. An output circuit in the user readable circuit indicates when the charge on the capacitance reaches a predetermined threshold. A test enabling element is responsive to a test enable signal for selectively changing the switch device between its second condition and its first condition to conduct a test for measuring the RC time constant, thereby testing the programmability of the programmable device.
Inventors
- 👤 Maurice M. Moll
- 👤 Daniel L. Ellsworth
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 11:08
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/04; G11C29/50; G11C29/50012; G11C17/00; G11C17/14; G11C17/18; G11C29/52
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
170 words
In a one time programmable memory device having a memory cell which includes an inherent capacitance, programmable means in the memory cell having a high initial resistance which is coupled with the inherent capacitance and has an RC time constant therewith, and user readable means for reading the condition of the programmable means, a circuit for non-destructively testing the programmability of the programmable means comprising: switch means in the user readable means and connected to the inherent capacitance of said memory cell, said switch means having a first condition for discharging said inherent capacitance and a second condition for allowing said inherent capacitance to charge through said programmable means; output means in the user readable means for indicating when the charge on the inherent capacitance reaches a predetermined threshold; test enabling means responsive to a test enable signal for selectively changing said switch means between its second condition and its first condition to conduct a test for measuring the RC time constant, thereby testing the programmability of the programmable means.
Claim 2
Dependent Claim
170 words
In a one time programmable memory device having a memory cell which includes an inherent capacitance, programmable means in the memory cell having a high initial resistance which is coupled with the inherent capacitance and has an RC time constant therewith, and user readable means for reading the condition of the programmable means, a circuit for non-destructively testing the programmability of the programmable means comprising: switch means in the user readable means and connected to the inherent capacitance of said memory cell, said switch means having a first condition for discharging said inherent capacitance and a second condition for allowing said inherent capacitance to charge through said programmable means; output means in the user readable means for indicating when the charge on the inherent capacitance reaches a predetermined threshold; test enabling means responsive to a test enable signal for selectively changing said switch means between its second condition and its first condition to conduct a test for measuring the RC time constant, thereby testing the programmability of the programmable means.
Claim 3
Dependent Claim
33 words
The circuit of claim 1 further comprising an inverter in said user readable means having its input connected for receiving the voltage on said inherent capacitance such that said predetermined threshold is established.
Claim 4
Dependent Claim
68 words
The circuit of claim 1, wherein said output means includes a pad having an output voltage responsive to the output voltage of said inverter, a feedback means connecting said pad to said switch means, and wherein said test enabling means is a logic device in said feedback means having one input for receiving said test enable signal and a second input for receiving the voltage on said pad.
Claim 5
Dependent Claim
13 words
The circuit of claim 3, wherein said logic device is a NOR gate.
Claim 6
Dependent Claim
43 words
The circuit of claim 3, wherein said switch means is a field effect transistor having its source grounded, its drain connected to the input of said inverter, and its gate connected to said feedback means for receiving the output of said logic device.
Claim 7
Dependent Claim
191 words
In a one time programmable memory device having a memory cell which includes an inherent capacitance, programmable means in the memory cell having a high initial resistance which is connected to said inherent capacitance and has an RC time constant therewith, and user readable means for reading the condition of the programmable means, a method for non-destructively testing the programmability of the programmable means comprising the steps of: providing a switch means having a first condition for discharging the inherent capacitance, and a second condition for allowing the inherent capacitance to charge through the initial resistance of the programmable means; providing output means in the user readable means for indicating when the charge on the inherent capacitance reaches a predetermined threshold; selectively placing said switch means in its first condition for discharging the inherent capacitance; subsequently placing said switch means in its second condition for allowing the inherent capacitance to charge through the initial resistance of the programmable means; and measuring the time between placing said switch means in its second condition and said indication from said output means that the charge on the inherent capacitance has reached said predetermined threshold.
Claim 8
Dependent Claim
191 words
In a one time programmable memory device having a memory cell which includes an inherent capacitance, programmable means in the memory cell having a high initial resistance which is connected to said inherent capacitance and has an RC time constant therewith, and user readable means for reading the condition of the programmable means, a method for non-destructively testing the programmability of the programmable means comprising the steps of: providing a switch means having a first condition for discharging the inherent capacitance, and a second condition for allowing the inherent capacitance to charge through the initial resistance of the programmable means; providing output means in the user readable means for indicating when the charge on the inherent capacitance reaches a predetermined threshold; selectively placing said switch means in its first condition for discharging the inherent capacitance; subsequently placing said switch means in its second condition for allowing the inherent capacitance to charge through the initial resistance of the programmable means; and measuring the time between placing said switch means in its second condition and said indication from said output means that the charge on the inherent capacitance has reached said predetermined threshold.
Claim 9
Dependent Claim
30 words
The method of claim 6 further comprising: comparing the measured time of the measuring step to standard known times for determining the probability that said programmable means will program properly.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-01-04 | 1991-07-06 | 1992-01-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-01-04 | 1995-07-06 | 1996-01-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-01-04 | 1999-07-06 | 2000-01-05 | $7700.00 | Window Closed / Lapsed |