Method of making trench-incorporated monolithic semiconductor capacitor and high density dynamic memory cells including the capacitor

Claim 1

A method of forming a high capacitance and low leakage mesa-shaped capacitor structure in a semiconductor structure comprising the steps of: (a) providing a semiconductor structure comprised of a substrate of a first type of conductivity having an epitaxial layer of an opposite conductivity type formed thereon, said layer having a heavily doped buried region of said opposite type of conductivity, said buried region serving as an electrode plate of the capacitor structure, said buried region being provided with a reach-through region in correspondence with the locations where a capacitor is to be formed; (b) forming a pattern of substantially vertical isolation trenches extending from one surface of said structure into said substrate through said epitaxial layer, thereby delineating a plurality of mesa shaped isolated regions of semiconductor material; (c) thermally oxidizing the sidewalls of said trenches to provide silicon dioxide layer serving as the dielectric for said capacitor structure; (d) forming a thin layer of doped polysilicon on the resulting structure; (e) forming a dual passivating layer of silicon dioxide and silicon nitride, in order, on the resulting structure; (f) removing by using a photolithographic process the nitride-oxide-polysilicon composite layer from everywhere except the trench sidewalls and the horizontal top surface of the mesa to define the other electrode plate of the capacitor structure and a polysilicon tab of the said other electrode, said tab to be subsequently used as the contact area of said other electrode plate; (g) subjecting the resulting semiconductor structure to an oxidizing ambient to oxidize the exposed edge portions of the polysilicon layer; (h) removing the nitride-oxide dual layer at the location of said contact area to expose said polysilicon tab; (i) exposing a surface portion of said reachthrough region; and (j) making ohmic contacts with both said polysilicon tab and the reach-through region.

Claim 2

A method of forming a high capacitance and low leakage mesa-shaped capacitor structure in a semiconductor structure comprising the steps of: (a) providing a semiconductor structure comprised of a substrate of a first type of conductivity having an epitaxial layer of an opposite conductivity type formed thereon, said layer having a heavily doped buried region of said opposite type of conductivity, said buried region serving as an electrode plate of the capacitor structure, said buried region being provided with a reach-through region in correspondence with the locations where a capacitor is to be formed; (b) forming a pattern of substantially vertical isolation trenches extending from one surface of said structure into said substrate through said epitaxial layer, thereby delineating a plurality of mesa shaped isolated regions of semiconductor material; (c) thermally oxidizing the sidewalls of said trenches to provide silicon dioxide layer serving as the dielectric for said capacitor structure; (d) forming a thin layer of doped polysilicon on the resulting structure; (e) forming a dual passivating layer of silicon dioxide and silicon nitride, in order, on the resulting structure; (f) removing by using a photolithographic process the nitride-oxide-polysilicon composite layer from everywhere except the trench sidewalls and the horizontal top surface of the mesa to define the other electrode plate of the capacitor structure and a polysilicon tab of the said other electrode, said tab to be subsequently used as the contact area of said other electrode plate; (g) subjecting the resulting semiconductor structure to an oxidizing ambient to oxidize the exposed edge portions of the polysilicon layer; (h) removing the nitride-oxide dual layer at the location of said contact area to expose said polysilicon tab; (i) exposing a surface portion of said reachthrough region; and (j) making ohmic contacts with both said polysilicon tab and the reach-through region.