Reactor apparatus for semiconductor wafer processing

Claim 2

A chemical vapor deposition reactor comprising a carrier having a plurality of cells arranged in a circle around a center, each cell having a pair of opposing flat surfaces with means for mounting substrates thereto, said surfaces oriented in two non-parallel planes intersecting in a line so as to form a first angle α with each other at said intersecting line, said intersecting line forming a second angle β with respect to the vertical; a pair of gas flow directors, a first director located below said carrier and a second director located above said carrier to maintain any gas flow through said carrier; an inlet means for introducing gas around the periphery of said carrier; and an exhaust means for removing gas from said center of said plurality of carrier cells; whereby gas flows through each cell in a direction substantially perpendicular to said intersecting line.

Claim 3

A reactor as in claim 1, wherein said first and second flow directors comprise substantially parallel, cone-shaped surfaces having their axis through said carrier center.

Claim 4

A reactor as in claim 2, further comprising first heating means located below said first gas flow director and second heating means located above said second gas flow director, whereby said substrates in said carrier cells are heated substantially uniformly.

Claim 5

A reactor as in claim 3, further comprising third heating means located around the periphery of said carrier for radiantly heating said carrier.

Claim 6

A reactor as in claim 1, wherein said carrier rotates with respect to said inlet means when said reactor is in operation.

Claim 7

A reactor as in claim 5, wherein said carrier cell surfaces rest upon said first gas flow director, said first gas flow director being rotated by a drive means when said reactor is in operation.

Claim 8

A reactor as in claim 1, wherein said carrier surfaces comprises removable plates.

Claim 9

A reactor as in claim 7, wherein said mounting means comprises pockets or pins in said plates.

Claim 10

A reactor as in claim 8, wherein adjoining surfaces of two adjacent cells comprise a unitary plate of solid construction.

Claim 11

A reactor as in claim 8, wherein adjoining surfaces of two adjacent cells comprise a unitary plate of hollowed out construction.

Claim 12

A reactor as in claim 8, wherein adjoining surfaces of two adjacent cells comprise two separate plates.

Claim 13

A semiconductor wafer processing reactor having a carrier and a means for introducing process gas, said carrier comprising: a plurality of cells, each cell having a pair of reciprocally facing flat surfaces having means for mounting substrates thereto, said surfaces separated in two nonparallel planes which intersect in a line, and defining an open end and a converging end, said cells arranged in a circle, said open ends of said cells on the outside of said circle and said converging ends on the inside of said circle, said intersecting line of each cell oriented in a generally vertical direction, said cells tilted so that said intersecting line of each cell forms an angle with respect to the vertical, whereby said substrates are held against said surfaces by gravity, and said gas introducing means arranged with respect to said carrier so that each carrier cell receives process gas at said open end for a gas flow between said surfaces to said converging end in a direction substantially perpendicular to said line.

Claim 14

A semiconductor wafer processing reactor having a carrier and a means for introducing process gas, said carrier comprising: a plurality of cells, each cell having a pair of reciprocally facing flat surfaces having means for mounting substrates thereto, said surfaces separated in two nonparallel planes which intersect in a line, and defining an open end and a converging end, said cells arranged in a circle, said open ends of said cells on the outside of said circle and said converging ends on the inside of said circle, said intersecting line of each cell oriented in a generally vertical direction, said cells tilted so that said intersecting line of each cell forms an angle with respect to the vertical, whereby said substrates are held against said surfaces by gravity, and said gas introducing means arranged with respect to said carrier so that each carrier cell receives process gas at said open end for a gas flow between said surfaces to said converging end in a direction substantially perpendicular to said line.

Claim 15

A semiconductor wafer processing reactor as in claim 12 further comprising a pair of gas flow directors, a first director located below said carrier and a second director located above said carrier to maintain any gas flow through said carrier.

Claim 16

A semiconductor wafer processing reactor as in claim 13 wherein said first and second flow directors comprise substantially parallel, cone-shaped surfaces having their axes through said carrier center.

Claim 17

A semiconductor wafer processing reactor as in claim 13 further comprising first heating means located below said first gas flow director and second heating means located above said second gas flow director, whereby substrates in said carrier cells are heated substantially uniformly.

Claim 18

A reactor as claim 15 further comprising third heating means located around the periphery of said carrier for radiantly heating said carrier.

Claim 19

A reactor as claim 13 wherein said carrier rests upon said first gas flow director, said first gas flow director being rotated by a drive means when said reactor is in operation.

Claim 20

A semiconductor wafer processing reactor having a carrier and a means for introducing process gas, said carrier comprising: a plurality of cells, each cell having a pair of reciprocally facing flat surfaces having means for mounting substrates thereto, said surfaces separated in two nonparallel planes which intersect in a line, and defining an open end and a converging end, said cells arranged in a circle, said open ends of said cells on the outside of said circle and said converging ends on the inside of said circle, said intersecting line of each cell oriented in a generally vertical direction, said cells tilted so that said intersecting line of each cell forms an angle with respect to the vertical, whereby said substrates are held against said surfaces by gravity, and said gas introducing means arranged with respect to said carrier so that each carrier cell receives process gas at said open end for a gas flow between said surfaces to said converging end.

Claim 21

A semiconductor wafer processing reactor having a carrier and a means for introducing process gas, said carrier comprising: a plurality of cells, each cell having a pair of reciprocally facing flat surfaces having means for mounting substrates thereto, said surfaces separated in two nonparallel planes which intersect in a line, and defining an open end and a converging end, said cells arranged in a circle, said open ends of said cells on the outside of said circle and said converging ends on the inside of said circle, said intersecting line of each cell oriented in a generally vertical direction, said cells tilted so that said intersecting line of each cell forms an angle with respect to the vertical, whereby said substrates are held against said surfaces by gravity, and said gas introducing means arranged with respect to said carrier so that each carrier cell receives process gas at said open end for a gas flow between said surfaces to said converging end.

Claim 22

A semiconductor wafer processing reactor as in claim 18 further comprising a pair of gas flow directors, a first director located below said carrier and a second director located above said carrier to maintain any gas flow through said carrier.

Claim 23

A semiconductor wafer processing reactor as in claim 19 wherein said first and second flow directors comprise substantially parallel, cone-shaped surfaces having their axes through said carrier center.

Claim 24

A semiconductor wafer processing reactor as in claim 19 further comprising first heating means located below said first gas flow director and second heating means located above said second gas flow director, whereby substrates in said carrier cells are heated substantially uniformly.

Claim 25

A reactor as claim 21 further comprising third heating means located around the periphery of said carrier for radiantly heating said carrier.

Claim 26

A reactor as claim 19 wherein said carrier rests upon said first gas flow director, said first gas flow director being rotated by a drive means when said reactor is in operation.

Claim 27

A carrier for a semiconductor wafer processing reactor, said carrier comprising: a plurality of circularly arranged upright plates, said plates having pairs of reciprocally facing flat surfaces, said flat surfaces having means for mounting wafers thereto, each surface pair separated in two nonparallel planes intersecting in a line, and defining a cell therebetween, said cell and said intersecting line forming a pie-slice configuration, said plates tilted so that said intersecting line of each surface pair and cell forms an angle with respect to the vertical, whereby said substrates are held against said surfaces by gravity and said pie-slice configuration of each cell and intersecting line is maintained.

Claim 28

A carrier for a semiconductor wafer processing reactor, said carrier comprising: a plurality of circularly arranged upright plates, said plates having pairs of reciprocally facing flat surfaces, said flat surfaces having means for mounting wafers thereto, each surface pair separated in two nonparallel planes intersecting in a line, and defining a cell therebetween, said cell and said intersecting line forming a pie-slice configuration, said plates tilted so that said intersecting line of each surface pair and cell forms an angle with respect to the vertical, whereby said substrates are held against said surfaces by gravity and said pie-slice configuration of each cell and intersecting line is maintained.