Method of manufacturing thin film transistor

Claim 1

A process for manufacturing a thin film transistor comprising: forming four layers by successively laminating on an insulation substrate a metal layer as a gate electrode, a first insulation layer as a gate insulation layer, a semiconductor layer and an electrode layer which makes an ohmic contact with said semiconductor layer, etching said four layers by coating on a photoresist and developing it to form a pattern then applying etchant to etch said four layers in said pattern, laminating on a second insulation layer without removing the photoresist which remains after the etching step, removing the remaining photoresist by a lift-off process, laminating on a transparent conductive layer as a source electrode and a drain electrode or display electrode, etching said transparent conductive layer and said electrode layer which makes an ohmic contact with said semiconductor layer to separate them into layer portions and to thereby provide said transparent conductive layer as said source electrode and said drain or display electrode.