US4666557A — Method for forming channel stops in vertical semi…

Claim 1

Independent Claim 136 words

A process for forming diffusion regions of predetermined shallow depth in a semiconductor substrate comprising: etching selected substrate regions to provide horizontal surfaces and form substantially vertical sidewalls in the substrate; forming a layer of doped material on the etched substrate surface topology including the vertical sidewalls and horizontal surfaces; applying an anisotropic etch medium to the layer of doped material to remove the layer from the horizontal surfaces of the substrate while leaving the vertical sidewall sections of the doped material layer intact; and following the anistropic etch removal of the doped material layer from the horizontal surfaces heating the structure to effectuate a diffusion of dopant from the retained sidewall sections of doped material into the vertical sidewalls of the substrate because of differences in the segregation coefficients of the substrate and doped materials.

Claim 2

Dependent Claim 136 words

A process for forming diffusion regions of predetermined shallow depth in a semiconductor substrate comprising: etching selected substrate regions to provide horizontal surfaces and form substantially vertical sidewalls in the substrate; forming a layer of doped material on the etched substrate surface topology including the vertical sidewalls and horizontal surfaces; applying an anisotropic etch medium to the layer of doped material to remove the layer from the horizontal surfaces of the substrate while leaving the vertical sidewall sections of the doped material layer intact; and following the anistropic etch removal of the doped material layer from the horizontal surfaces heating the structure to effectuate a diffusion of dopant from the retained sidewall sections of doped material into the vertical sidewalls of the substrate because of differences in the segregation coefficients of the substrate and doped materials.

Claim 3

Dependent Claim 17 words

The process of claim 1 wherein the heating step comprises a selective heating of the doped material.

Claim 4

Dependent Claim 26 words

The process of claim 1 wherein the heating step comprises a selective heating of the doped material using a laser of wavelength of about 10.6 micrometers.

Claim 5

Dependent Claim 43 words

The process of claims 2 or 3 wherein the doping profile of the resulting diffused substrate regions are controlled by the impurity concentration of the doped material, the thickness of the doped material sidewall layer, and the time/temperature product of the heating step.

Claim 6

Dependent Claim 23 words

The process of claim 1, further comprising, after the drive-in step, forming a dielectric material in the regions where the substrate was etched.

Claim 7

Dependent Claim 14 words

The process of claim 4, wherein the doped material is a heavily doped dielectric.

Claim 8

Dependent Claim 127 words

A process for forming channel stop diffusion regions in a semiconductor substrate, comprising: anisotropically etching the substrate to form trenches therein having substantially vertical sidewalls; depositing, on the resulting etched substrate surface topology including the vertical sidewalls, a layer of doped glass; applying an anisotropic etch medium to the layer of doped glass to remove glass from the horizontal surfaces of the substrate surfaces while leaving the vertical trench sidewall sections of the layer; following the etch removal of the doped glass from the horizontal surfaces heating the structure to drive the dopant in the glass layer on the vertical trench sidewalls into the adjacent substrate sidewalls using the segration coefficients of the dopant in glass and in semiconductor material; and filling the trench with dielectric material.

Claim 9

Dependent Claim 127 words

A process for forming channel stop diffusion regions in a semiconductor substrate, comprising: anisotropically etching the substrate to form trenches therein having substantially vertical sidewalls; depositing, on the resulting etched substrate surface topology including the vertical sidewalls, a layer of doped glass; applying an anisotropic etch medium to the layer of doped glass to remove glass from the horizontal surfaces of the substrate surfaces while leaving the vertical trench sidewall sections of the layer; following the etch removal of the doped glass from the horizontal surfaces heating the structure to drive the dopant in the glass layer on the vertical trench sidewalls into the adjacent substrate sidewalls using the segration coefficients of the dopant in glass and in semiconductor material; and filling the trench with dielectric material.

Claim 10

Dependent Claim 35 words

The process of claim 7, wherein the heating step uses rapid thermal annealing techniques to drive the opant into the substrate trench sidewalls and thereby form channel stops about 0.1 to 0.2 micrometers in depth.

Claim 11

Dependent Claim 48 words

The process of claim 7, wherein the heating step uses a non-oxidizing ambient at a temperature of 900° to 1100° C. for a period of 2 to 5 hours to drive the dopant into the substrate trench sidewalls and thereby form channel stops about 0.1 micrometers in depth.

Claim 12

Dependent Claim 38 words

The process of claim 7 wherein the heating step uses a laser of approximately 10.6 micrometer wavelength to drive the dopant into the substrate trench sidewalls and thereby form channel stops about 0.1 to 0.2 μ in depth.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1990-05-18	1990-11-17	1991-05-19	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1994-05-18	1994-11-17	1995-05-19	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	1998-05-18	1998-11-17	1999-05-19	$7700.00	Window Closed / Lapsed

Method for forming channel stops in vertical semiconductor surfaces

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