Process for forming isolated silicon regions and field-effect devices on a silicon substrate

Claim 2

In the fabrication of field-effect devices on a silicon substrate where insulative regions are used to isolate said devices from one another, improved processing comprising the steps of: forming an insulative layer on said substrate so as to define windows between regions of said insulative layer; etching said insulative layer to expose said substrate at said windows; forming a silicon layer over said insulative regions and windows; subjecting said layer of silicon to a treatment which causes recrystallization of said silicon layer, said recrystallization occurring by crystal growth from said substrate expanding into said silicon layer through said windows and further expanding laterally in said silicon layer disposed above said insulative regions; forming a gate, wherein said gate is disposed above said windows; doping regions of said silicon layer disposed above said insulative layer to form drain and source regions; whereby source and drain regions are isolated from said substrate by said insulative layer;

Claim 3

The process defined by claim 1 including the additional step of defining isolated regions in said recrystallized layer of silicon, such that each of said devices is isolated from one another within said recrystallized layer.

Claim 4

The process defined by claim 2 wherein the channels of said devices lie generally over said windows.

Claim 5

The process defined by claim 1 wherein said silicon substrate is a monocrystalline silicon and wherein said recrystallized layer of silicon takes on the crystal orientation of said substrate so as to form an epitaxial-like upper silicon layer.

Claim 6

The process defined by claim 4 wherein said step of forming said layer of silicon comprises the step of forming a layer of polysilicon.

Claim 7

The process defined by claim 4 wherein said step of forming a layer of silicon comprises the step of forming a layer of amorphous silicon.

Claim 8

The process defined by claim 1 wherein said insulative regions are silicon dioxide regions grown from said substrate.

Claim 9

The process defined by claim 7 including the step of planarizing said grown silicon dioxide regions prior to said step of forming said layer of silicon.

Claim 10

The process defined by claim 1 wherein said step of subjecting said layer of silicon to treatment to form said recrystallized silicon, comprises the heating of said layer of silicon.

Claim 11

A process for fabricating field-effect transistors (FETs) on a silicon substrate, comprising the steps of: forming an oxide layer on said substrate so as to define windows between regions of said oxide layer; etching said oxide layer to expose said substrate at said windows; forming a silicon layer over said oxide regions and windows, said silicon layer contacting said substrate between said spaced apart oxide regions; forming a silicon composite layer over said silicon layer; subjecting said silicon layer to a treatment which causes recrystallization of said silicon layer such that said silicon layer takes on the crystalline structure of said substrate, said recrystallization occurring by crystal growth from said substrate expanding into said silicon layer through said windows and further expanding laterally in said silicon layer disposed above said oxide regions; forming gates, wherein each of said gates is disposed above each of said windows; doping regions of said silicon layer disposed above said first oxide layer to form drain and source regions of said FETs; whereby source and drain regions are isolated from said substrate by said oxide layer.

Claim 12

A process for fabricating field-effect transistors (FETs) on a silicon substrate, comprising the steps of: forming an oxide layer on said substrate so as to define windows between regions of said oxide layer; etching said oxide layer to expose said substrate at said windows; forming a silicon layer over said oxide regions and windows, said silicon layer contacting said substrate between said spaced apart oxide regions; forming a silicon composite layer over said silicon layer; subjecting said silicon layer to a treatment which causes recrystallization of said silicon layer such that said silicon layer takes on the crystalline structure of said substrate, said recrystallization occurring by crystal growth from said substrate expanding into said silicon layer through said windows and further expanding laterally in said silicon layer disposed above said oxide regions; forming gates, wherein each of said gates is disposed above each of said windows; doping regions of said silicon layer disposed above said first oxide layer to form drain and source regions of said FETs; whereby source and drain regions are isolated from said substrate by said oxide layer.

Claim 13

The process defined by claim 10 wherein said step of forming said silicon layer comprises the formation of a polysilicon layer.

Claim 14

The process defined by claim 10 wherein said step of forming said silicon layer comprises the step of forming an amorphous silicon layer.

Claim 15

The process defined by claims 11 or 12 wherein said step of forming spaced apart oxide regions comprises the step of growing oxide regions from said substrate.

Claim 16

The process defined by claim 13 wherein said step of subjecting said silicon layer to a treatment which causes said recrystallization includes the heating of said silicon layer.

Claim 17

The process defined by claim 14 where prior to the formation of said silicon layer, said oxide regions are planarized.

Claim 18

The process defined by claim 10 including steps to form isolated regions in said recrystallized silicon layer by removing portions of said silicon layer above said oxide region, permitting a second oxide layer to grow into said vacated portion such that said second oxide layer contacts said first oxide layer, wherein drains and sources of each FET are isolated from drains and sources of other FETs by said oxide layers.