Patent US4652833A successfully refreshed from Google Patents.
US4652833A
Expired / Lapsed
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Comparator with noise suppression
Assignee: National Aeronautics and Space Administration
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Filing: 1984-12-18
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Granted: 1987-03-24
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Expires: 2004-12-18
Abstract
Abstract Apparatus for generating a single pulse the first time only that a noisy cyclic signal exceeds a reference level during a half-cycle. For the positive half of a cycle of the noisy cyclic signal, a comparator 12 and a multivibrator 14 produces a fixed voltage output when the noisy cyclic signal first exceeds the reference level. A multivibrator 23 stops the production of the fixed voltage output when the noisy cyclic signal next passes the zero voltage level in the negative direction. Consequently, a single pulse is generated indicating that the signal exceeded the reference level during that half-cycle. Comparator 16 and multivibrator 17 are for producing pulses whenever the noisy cyclic signal exceeds the reference level during the negative half-cycle.
Inventors
- 👤 Colossie N. Batts
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 10:55
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/08; H03K5/125; H03K5/1252
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
133 words
A method for preventing multiple triggerings that occur when normal comparators are driven by a noisy cyclic signal that is cyclic about a fixed voltage level comprising the steps of: comparing the noisy cyclic signal with a reference voltage level different from the fixed voltage level; producing a fixed output voltage level when during a half-cycle of the noisy cyclic signal the noisy cyclic signal first exceeds said reference voltage level; generating a clear pulse from the noisy cyclic signal each said half-cycle; and stopping the production of said fixed output voltage level using said clear pulse when the noisy cyclic signal next passes the fixed voltage level whereby a single pulse is produced indicating that the noisy cyclic voltage exceeded said reference voltage level during said half-cycle of the noisy cyclic signal.
Claim 2
Independent Claim
133 words
A method for preventing multiple triggerings that occur when normal comparators are driven by a noisy cyclic signal that is cyclic about a fixed voltage level comprising the steps of: comparing the noisy cyclic signal with a reference voltage level different from the fixed voltage level; producing a fixed output voltage level when during a half-cycle of the noisy cyclic signal the noisy cyclic signal first exceeds said reference voltage level; generating a clear pulse from the noisy cyclic signal each said half-cycle; and stopping the production of said fixed output voltage level using said clear pulse when the noisy cyclic signal next passes the fixed voltage level whereby a single pulse is produced indicating that the noisy cyclic voltage exceeded said reference voltage level during said half-cycle of the noisy cyclic signal.
Claim 3
Independent Claim
258 words
A method for preventing multiple triggerings that occur when normal comparators are driven by a noisy cyclic signal that is cyclic about a zero voltage level comprising the steps of: comparing the noisy cyclic signal with a positive reference voltage level; producing a fixed output voltage level when during the positive portion of any cycle of the noisy cyclic signal the noisy cyclic signal first exceeds said positive reference voltage; generating a clear pulse from the noisy cyclic signal during the positive portion of any cycle of the noisy cyclic signal; stopping the production of said fixed output voltage level using said clear pulse generated during the positive portion of any cycle of the noisy cyclic signal when said noisy cyclic signal next passes said zero voltage level; inverting the noisy cyclic signal; comparing the inverted noisy cyclic signal with said positive reference voltage; producing said fixed output voltage level when during the negative portion of any cycle of the noisy cyclic signal the noisy cyclic signal first exceeds said positive reference voltage; generating a clear pulse from the noisy cyclic signal during the negative portion of any cycle of the noisy cyclic signal; and stopping the production of said fixed output voltage level using said clear pulse generated during the negative portion of any cycle of the noisy cyclic signal when said noisy cyclic signal next passes said zero voltage level, whereby single pulses are produced indicating when said noisy cyclic signal exceeds said reference voltage during the positive and negative portions of said noisy cyclic signal.
Claim 4
Independent Claim
258 words
A method for preventing multiple triggerings that occur when normal comparators are driven by a noisy cyclic signal that is cyclic about a zero voltage level comprising the steps of: comparing the noisy cyclic signal with a positive reference voltage level; producing a fixed output voltage level when during the positive portion of any cycle of the noisy cyclic signal the noisy cyclic signal first exceeds said positive reference voltage; generating a clear pulse from the noisy cyclic signal during the positive portion of any cycle of the noisy cyclic signal; stopping the production of said fixed output voltage level using said clear pulse generated during the positive portion of any cycle of the noisy cyclic signal when said noisy cyclic signal next passes said zero voltage level; inverting the noisy cyclic signal; comparing the inverted noisy cyclic signal with said positive reference voltage; producing said fixed output voltage level when during the negative portion of any cycle of the noisy cyclic signal the noisy cyclic signal first exceeds said positive reference voltage; generating a clear pulse from the noisy cyclic signal during the negative portion of any cycle of the noisy cyclic signal; and stopping the production of said fixed output voltage level using said clear pulse generated during the negative portion of any cycle of the noisy cyclic signal when said noisy cyclic signal next passes said zero voltage level, whereby single pulses are produced indicating when said noisy cyclic signal exceeds said reference voltage during the positive and negative portions of said noisy cyclic signal.
Claim 5
Dependent Claim
138 words
A comparator apparatus which prevents multiple triggering when driven with a noisy cyclic signal that is cyclic about a fixed voltage level comprising: a reference voltage level different from the fixed voltage level; a comparator means receiving said reference voltage level and the noisy cyclic signal for producing a fixed output voltage level whenever during a half-cycle of the noisy cyclic signal the noisy cyclic signal first exceeds said reference voltage level; means for generating a clear pulse from the noisy cyclic signal each said half-cycle; and means for stopping the production of said fixed output voltage level using said clear pulse when said noisy cyclic signal next passes said fixed voltage level, whereby a single pulse is produced indicating that said noisy cyclic signal exceeded said reference voltage level during said half-cycle of the noisy cyclic signal.
Claim 6
Dependent Claim
138 words
A comparator apparatus which prevents multiple triggering when driven with a noisy cyclic signal that is cyclic about a fixed voltage level comprising: a reference voltage level different from the fixed voltage level; a comparator means receiving said reference voltage level and the noisy cyclic signal for producing a fixed output voltage level whenever during a half-cycle of the noisy cyclic signal the noisy cyclic signal first exceeds said reference voltage level; means for generating a clear pulse from the noisy cyclic signal each said half-cycle; and means for stopping the production of said fixed output voltage level using said clear pulse when said noisy cyclic signal next passes said fixed voltage level, whereby a single pulse is produced indicating that said noisy cyclic signal exceeded said reference voltage level during said half-cycle of the noisy cyclic signal.
Claim 7
Dependent Claim
25 words
A comparator apparatus according to claim 3 wherein said comparator means includes a comparator with a multivibrator connected to receive the output from the comparator.
Claim 8
Dependent Claim
29 words
A comparator apparatus according to claim 4 wherein said means for stopping the production of said fixed output voltage comprises means for applying said clear pulse to said multivibrator.
Claim 9
Dependent Claim
192 words
Apparatus for comparing a noisy cyclic signal that is cyclic about a zero voltage level with a reference level voltage and for producing a single pulse each time the noisy cyclic signal exceeds the reference level voltage during each half-cycle of the noisy cyclic signal comprising: a first comparator means receiving the noisy cyclic signal and the reference level voltage for producing a first fixed voltage level output the first time during the positive portion of any cycle of the noisy cyclic signal exceeds the reference level voltage; a second comparator means receiving the noisy cyclic signal and the reference level voltage for producing a second fixed level voltage output the first time during the negative portion of any cycle of the noisy cyclic signal exceeds the reference level voltage in the negative direction; means generating a first and second clear pulse whenever the noisy cyclic signal crosses the zero voltage level in the positive and negative directions, respectively; and means receiving said first and second clear pulse for stopping the productions of said first and second fixed level voltage output, respectively, whenever the noisy cyclic signal crosses the zero voltage level.
Claim 10
Dependent Claim
192 words
Apparatus for comparing a noisy cyclic signal that is cyclic about a zero voltage level with a reference level voltage and for producing a single pulse each time the noisy cyclic signal exceeds the reference level voltage during each half-cycle of the noisy cyclic signal comprising: a first comparator means receiving the noisy cyclic signal and the reference level voltage for producing a first fixed voltage level output the first time during the positive portion of any cycle of the noisy cyclic signal exceeds the reference level voltage; a second comparator means receiving the noisy cyclic signal and the reference level voltage for producing a second fixed level voltage output the first time during the negative portion of any cycle of the noisy cyclic signal exceeds the reference level voltage in the negative direction; means generating a first and second clear pulse whenever the noisy cyclic signal crosses the zero voltage level in the positive and negative directions, respectively; and means receiving said first and second clear pulse for stopping the productions of said first and second fixed level voltage output, respectively, whenever the noisy cyclic signal crosses the zero voltage level.
Claim 11
Dependent Claim
18 words
Apparatus according to claim 6 wherein said first comparator means includes a first comparator and a first multivibrator.
Claim 12
Dependent Claim
20 words
Apparatus according to claim 7 wherein said second comparator means includes an inverter, a second comparator and a second multivibrator.
Claim 13
Dependent Claim
55 words
Apparatus according to claim 8 wherein said means for stopping the productions of said first and second fixing level voltage outputs comprises means for applying said first and second clear pulse to said first and second multivibrators, respectively, whenever the noisy cyclic signal passes the zero level voltage in the negative and positive directions, respectively.
Claim 14
Dependent Claim
92 words
Apparatus according to claim 9 wherein said means for generating said first and second clear pulse includes an amplifier connected to receive the noisy cyclic signal, a resistor and a zener diode connected in series between the output of said amplifier and ground, a third multivibrator connected to the junction of said resistor and zener diode for supplying said first clear pulse to said first multivibrator, and an inverter and fourth multivibrator connected to the junction of said resistor and zener diode for supplying said second clear pulse to said second multivibrator.
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