US4646126A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device
Assignee: Toshiba Corp
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Filing: 1984-08-08
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Granted: 1987-02-24
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Expires: 2004-08-08
Abstract
Abstract Disclosed is a semiconductor device in which IC chips, tested and evaluated as good, are mounted on a silicon substrate, and interconnection wiring layers and pads for IC chips are provided on the substrate with an insulation film interposed therebetween.
Inventors
- 👤 Tetsuya Iizuka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 13:52
CPC Classifications
H; H10; H10W; H10W44/00; H10W44/601; H10W70/00; H10W70/20; H10W70/24; H10W70/26; H10W70/60; H10W70/67; H10W70/69; H10W70/698; H10W72/00; H10W72/071; H10W72/075; H10W72/50; H10W72/531; H10W72/536; H10W72/551; H10W72/552; H10W72/5522; H10W72/59; H10W72/90; H10W72/951; H10W72/952; H10W72/981; H10W72/983; H10W90/00; H10W90/701; H10W90/751; H10W90/753; H10W90/754
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
137 words
A semiconductor device comprising: a semiconductor substrate; an IC chip mounted directly on a first region of said substrate; a first insulation film formed on said substrate, said first insulation film having one region thinner than any other region; an interconnection wiring layer serving as a power line formed on said one region of said first insulation film, said first insulation film and said interconnection wiring layer and said substrate forming a capacitor to serve as a filter for reducing noise coming from said power line; a second insulation film formed on said interconnection wiring layer; a conductive bonding layer for forming an electrical connection for said IC chip, said conductive bonding layer being formed on said second insulation film above said interconnection wiring layer; and means for connecting said IC chip and said conductive bonding layer.
Claim 2
Dependent Claim
137 words
A semiconductor device comprising: a semiconductor substrate; an IC chip mounted directly on a first region of said substrate; a first insulation film formed on said substrate, said first insulation film having one region thinner than any other region; an interconnection wiring layer serving as a power line formed on said one region of said first insulation film, said first insulation film and said interconnection wiring layer and said substrate forming a capacitor to serve as a filter for reducing noise coming from said power line; a second insulation film formed on said interconnection wiring layer; a conductive bonding layer for forming an electrical connection for said IC chip, said conductive bonding layer being formed on said second insulation film above said interconnection wiring layer; and means for connecting said IC chip and said conductive bonding layer.
Claim 3
Dependent Claim
18 words
A semiconductor device according to claim 1, in which said interconnection wiring layer is made of polycrystalline silicon.
Claim 4
Dependent Claim
17 words
A semiconductor device according to claim 1, in which said interconnection wiring layer is made of aluminum.
Claim 5
Dependent Claim
158 words
A semiconductor device comprising: a semiconductor substrate; an IC chip mounted directly on a first region of said substrate; a first insulation film formed on said substrate, said first insulation film having one region thinner than any other region; an interconnection wiring layer, located in close proximity to said first region of said substrate wherein said IC chip is placed, said interconnection wiring layer serving as a power line formed on said one region of said first insulation film, said first insulation film and said interconnection wiring layer and said substrate forming a capacitor to serve as a filter for reducing noise coming from said power line; a second insulation film formed on said interconnection wiring layer; a conductive bonding layer for forming an electrical connection for said IC chip, said conductive bonding layer being formed on said second insulation film above said interconnection wiring layer; and means for connecting said IC chip and said conductive bonding layer.
Claim 6
Dependent Claim
158 words
A semiconductor device comprising: a semiconductor substrate; an IC chip mounted directly on a first region of said substrate; a first insulation film formed on said substrate, said first insulation film having one region thinner than any other region; an interconnection wiring layer, located in close proximity to said first region of said substrate wherein said IC chip is placed, said interconnection wiring layer serving as a power line formed on said one region of said first insulation film, said first insulation film and said interconnection wiring layer and said substrate forming a capacitor to serve as a filter for reducing noise coming from said power line; a second insulation film formed on said interconnection wiring layer; a conductive bonding layer for forming an electrical connection for said IC chip, said conductive bonding layer being formed on said second insulation film above said interconnection wiring layer; and means for connecting said IC chip and said conductive bonding layer.
Claim 7
Dependent Claim
15 words
A semiconductor device according to claim 1, in which said substrate is made of silicon.
Claim 8
Dependent Claim
16 words
A semiconductor device according to claim 5, in which said substrate has a high impurity concentration.
Claim 9
Dependent Claim
15 words
A semiconductor device according to claim 4, in which substrate has a high impurity concentration.
Claim 10
Dependent Claim
15 words
A semiconductor device according to claim 4, in which said substrate is made of silicon.
Claim 11
Dependent Claim
18 words
A semiconductor device according to claim 4, in which said interconnection wiring layer is made of polycrystalline silicon.
Claim 12
Dependent Claim
17 words
A semiconductor device according to claim 4, in which said interconnection wiring layer is made of aluminum.
References Cited (Backward Citations)
US3255511A
Cited
US3619731A
Cited
US3908187A
Cited
US4083063A
Cited
US4023197A
Cited
US4017341A
Cited
US4074342A
Cited
US4122479A
Cited
US4143385A
Cited
US4199778A
Cited
JPS5586144A
Cited
US4285001A
Cited
US4380114A
Cited
JPS5693359A
Cited
JPS58154254A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-02-23 | 1990-08-25 | 1991-02-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-02-23 | 1994-08-25 | 1995-02-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-02-23 | 1998-08-25 | 1999-02-24 | $7700.00 | Window Closed / Lapsed |