Programmable push-pop memory stack

Claim 1

A data stack for sequentially receiving data from a data processing system including means for transmitting address signals, means for transmitting data and means for transmitting commands in synchronism with the data, the data stack storing the data and transmitting the stored data in a selected one of a FIFO and a LIFO sequence in response to commands from the data processing system, the data stack comprising: means for generating timing signals; a random access memory connected to the data transmitting means and having a plurality of addressable storage locations, means for receiving address signals and data signals and for storing the received data signals in a storage location identified by the address signals in response to the receipt of a write enabling signal, and means for transmitting contents of a storage location identified by the address signals in response to the receipt of a read enabling signal; state means connected to the timing signal generating means, the command transmitting means and the random access memory for generating read and write enabling signals and address signals identifying a storage location in the random access memory in response to each command in synchronism with the timing signals, the address signals being transmitted to the random access memory address signal receiving means and the state means, the state means generating address signals in response to the commands and address signals transmitted by the state means at the next succeeding timing signal for reading information from the random access memory means in a selected one of a FIFO and a LIFO sequence; and means for selectively coupling address signals from the data processing system or address signals from the state means to the random access memory.