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US4590589A Expired / Lapsed US ⏱️ 0.0 years remaining

Electrically programmable read only memory

Assignee: INTERNATIONAL MICROELECTRONIC PRODUCTS Corp 2830 NORTH FIRST STREET SAN JOSE CA A CORP OF CA
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Filing: 1982-12-21
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Granted: 1986-05-20
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Expires: 2002-12-21
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Abstract

Abstract A programmable read only memory (PROM) includes voltage programmable structures which are readily fabricated to provide predictable and selectable programming voltages. The resistor structure includes a body of semiconductor material having high electrical conductance and a surface contact region having a crystalline structure characterized by relatively high electrical resistance. The relatively high electrical resistance can be established by amorphotizing the surface region or by forming lattice defects in the crystalline structure such as by ion implantation. In programming the PROM, a sufficient voltage is applied across, or sufficient current is applied through, selected structures whereby the surface regions thereof are heated sufficiently to reduce the relatively high electrical resistance.

Inventors

  • 👤 Levy Gerzberg

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 18:28
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14; G11C17/16; H; H10; H10B; H10B63/00; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 170 words
A programmable read only memory device comprising a plurality of active and passive circuit elements forming a memory cell, a plurality of voltage programmable resistor structures interconnecting said plurality of active and passive circuit elements, each of said programmable structures comprising a body of doped semiconductor material the bulk of which is characterized by first electrical conductance, said body having a contact surface and including a doped surface region abutting said contact surface, said doped surface region having a material structure characterized by a second electrical conductance lower than said first electrical conductance, electrical contact means engaging said contact surface, variable voltage means interconnected to said electrical contact means for applying an operating voltage to said voltage programmable resistor structures which does not affect the electrical characteristics of said doped surface region and for applying a programming voltage of greater magnitude than said operating voltage which increases said second electrical conductance in a magnitude closer to said first electrical conductance, and address means for addressing and reading said memory device.
Claim 2
Dependent Claim 170 words
A programmable read only memory device comprising a plurality of active and passive circuit elements forming a memory cell, a plurality of voltage programmable resistor structures interconnecting said plurality of active and passive circuit elements, each of said programmable structures comprising a body of doped semiconductor material the bulk of which is characterized by first electrical conductance, said body having a contact surface and including a doped surface region abutting said contact surface, said doped surface region having a material structure characterized by a second electrical conductance lower than said first electrical conductance, electrical contact means engaging said contact surface, variable voltage means interconnected to said electrical contact means for applying an operating voltage to said voltage programmable resistor structures which does not affect the electrical characteristics of said doped surface region and for applying a programming voltage of greater magnitude than said operating voltage which increases said second electrical conductance in a magnitude closer to said first electrical conductance, and address means for addressing and reading said memory device.
Claim 3
Dependent Claim 23 words
A programmable read only memory device as defined by claim 1 wherein said material structure of said surface region includes crystal lattice disruptions.
Claim 4
Dependent Claim 25 words
A programmable read only memory device as defined by claim 1 wherein said material structure of said surface region includes fine crystalline grain semiconductor material.
Claim 5
Dependent Claim 27 words
A programmable read only memory as defined by claim 1 wherein said device comprises a semiconductor substrate and said programmable resistor structures are formed in said substrate.
Claim 6
Dependent Claim 37 words
A programmable read only memory as defined by claim 1 wherein said device comprises a semiconductor substrate and at least some of said plurality of voltage programmable resistor structures are formed on the surface of said substrate.
Claim 7
Dependent Claim 23 words
A programmable read only memory device as defined by claim 1 wherein said material structure of said surface region includes amorphous semiconductor material.

References Cited (Backward Citations)

US4146902A Cited
US4210996A Cited
US4238694A Cited
US4174521A Cited
US4240843A Cited
US4476478A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-05-19 1989-11-18 1990-05-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-05-19 1993-11-18 1994-05-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-05-19 1997-11-18 1998-05-20 $7700.00 Window Closed / Lapsed

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