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US4571609A Expired / Lapsed US ⏱️ 0.0 years remaining

Stacked MOS device with means to prevent substrate floating

Assignee: Toshiba Corp
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Filing: 1984-04-03
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Granted: 1986-02-18
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Expires: 2004-04-03
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Abstract

Abstract An MOS type semiconductor device having a semiconductor substrate, an insulating layer formed in or on said semiconductor substrate, and an MOS transistor formed on said insulating layer, characterized in that said insulating layer is formed at a region below said MOS transistor excluding at least part of the region below a channel region of said MOS transistor.

Inventors

  • 👤 Hiroshi Hatano

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 23:41
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/027; H10D30/0278; H10D30/60; H10D30/67; H10D30/6704; H10D30/6708; H10D62/00; H10D62/10; H10D62/113; H10D62/115; H10D62/116; H10D84/00; H10D84/01; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/856; H10D86/00; H10D86/201; H10D88/00; H10D88/01; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W; H10W10/00; H10W10/01; H10W10/061; H10W10/10; H10W10/181; H10D84/8311; H10D84/8312; H10D84/83138; H10W10/021; H10W10/20; Y; Y10; Y10S; Y10S257/00; Y10S257/901

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 150 words
An MOS type semiconductor device comprising: a. a semiconductor substrate of a first conducting type; b. a first MOS transistor formed on a portion of said semiconductor substrate; c. an insulating layer formed on said first MOS transistor and on a portion of said substrate, said insulating layer having an opening to said substrate; and d. a second MOS transistor formed on said insulating layer at least in part over said first MOS transistor, said second MOS transistor comprising a source region of a second conductivity type completely separated from said substrate by said insulating layer, a drain region of said second conductivity type spaced from said source region and completely separated from said substrate by said insulating layer, and a channel region of said first conductivity type located between said source and drain regions and over said opening in said insulating layer and contacting said substrate through said opening.
Claim 2
Dependent Claim 150 words
An MOS type semiconductor device comprising: a. a semiconductor substrate of a first conducting type; b. a first MOS transistor formed on a portion of said semiconductor substrate; c. an insulating layer formed on said first MOS transistor and on a portion of said substrate, said insulating layer having an opening to said substrate; and d. a second MOS transistor formed on said insulating layer at least in part over said first MOS transistor, said second MOS transistor comprising a source region of a second conductivity type completely separated from said substrate by said insulating layer, a drain region of said second conductivity type spaced from said source region and completely separated from said substrate by said insulating layer, and a channel region of said first conductivity type located between said source and drain regions and over said opening in said insulating layer and contacting said substrate through said opening.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-02-17 1989-08-19 1990-02-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-02-17 1993-08-19 1994-02-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-02-17 1997-08-19 1998-02-18 $7700.00 Window Closed / Lapsed

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