Insulating gate field effect transistor
Abstract
Abstract PURPOSE:To reduce stray capacitance, by reducing reverse current leakage in the base and the channel region, avoiding contact between source and drain regions, and increasing the dielectric strength of the source region, the drain region and the base. CONSTITUTION:Thick oxide film 11, as insulating film, is formed on the surface of low-resistance P-type Si base 1, and opening A is provided by exposing a part of it. Next, by growing an epitaxial layer over the entire surface of base 1, high-resistance N-type single crystal Si layer 4, which becomes channel region, is formed on opening A, and high-resistance N-type polycrystalline Si layer 12 is formed on the surface of oxide film 11. Then, oxide film 11' is formed on the entire surface; and a window for diffusing drain and source is opened on the surface of channel region 4, which sandwiches channel region 4. Then oxide film is formed on the entire region again, oxide film on specified parts on regions 4, 2 and 3 is removed, and gate oxidation is operated. After this, reverse bias electrode 13 is formed on the back of base 1, together with gate, drain and source electrodes 8, 6 and 7.
Inventors
- 👤 Yoshiki Tanigawa
- 👤 Kunihiko Hirashima
Bibliographic Details
Claims Analysis
Total Claims: 0References Cited (Backward Citations)
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