US4570328A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of producing titanium nitride MOS device gate electrode
Assignee: Motorola Solutions Inc
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Filing: 1983-03-07
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Granted: 1986-02-18
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Expires: 2003-03-07
Abstract
Abstract An MOS device having a gate electrode and interconnect of titanium nitride and especially titanium nitride which is formed by low pressure chemical vapor deposition. In a more specific embodiment the titanium nitride gate electrode and interconnect have a silicon layer thereover to improve oxidation protection.
Inventors
- 👤 J. B. Price
- 👤 Philip J. Tobin
- 👤 Fabio Pintchovski
- 👤 Christian A. Seelbach
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 09:11
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/60; H10D64/66; H10D64/661; H10D64/662; H10D64/667; H10P; H10P14/00; H10P14/40; H10P14/412; H10P14/60; H10P14/69; H10P14/694; H10P14/6943; H10P14/69433; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4403; H10W20/4437; H10W20/4441; Y; Y10; Y10S; Y10S148/00; Y10S148/019; Y10S148/02; Y10S148/113; Y10S148/147; Y10S438/00; Y10S438/971
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
56 words
A method of making a metal oxide semiconductor device gate electrode and interconnect comprising the steps of: chemical vapor depositing at a reduced pressure below approximately 300 millitorr a layer of titanium nitride over a selected gate dielectric and interconnect area; and forming a layer of silicon in overlying relationship to said layer of titanium nitride.
Claim 2
Independent Claim
56 words
A method of making a metal oxide semiconductor device gate electrode and interconnect comprising the steps of: chemical vapor depositing at a reduced pressure below approximately 300 millitorr a layer of titanium nitride over a selected gate dielectric and interconnect area; and forming a layer of silicon in overlying relationship to said layer of titanium nitride.
Claim 3
Dependent Claim
27 words
A method as claimed in claim 1 wherein the chemical vapor depositing is performed at a temperature in the range of approximately 680° C. to 800° C.
Claim 4
Dependent Claim
26 words
A method as claimed in claim 2 wherein the chemical vapor depositing is performed at a pressure in the range of approximately 100 to 300 millitorr.
Claim 5
Dependent Claim
29 words
A method as claimed in claim 1 including the step of forming a layer of silicon prior to the step of chemical vapor depositing a layer of titanium nitride.
Claim 6
Dependent Claim
32 words
A method as claimed in claim 1 including in addition the step of annealing in situ the layer of titanium nitride at a temperature of approximately 900°-1000° C. for approximately 15 minutes.
Claim 7
Dependent Claim
30 words
A method as claimed in claim 5 including in addition the step of forming a layer of silicon in situ in overlying relationship to the annealed layer of titanium nitride.
Claim 8
Independent Claim
122 words
A method of making a metal oxide semiconductor device gate electrode and interconnect comprising the steps of: placing a semiconductor wafer in a chamber at a temperature in the range of approximately 680° C. to 800° C; lowering the pressure in the chamber into the range of approximately 100 to 300 millitorr; providing a continuous flow of hydrogen gas into the chamber to substantially remove any oxygen; providing a continuous flow of titanium tetrachloride vapor and ammonia vapor into the chamber; continuing the process until a layer of titanium nitride of the desired thickness is formed on the semiconductor wafer and on a selected gate dielectric; and annealing in situ the layer of titanium nitride at a temperature of approximately 900°-1000° C.
Claim 9
Independent Claim
122 words
A method of making a metal oxide semiconductor device gate electrode and interconnect comprising the steps of: placing a semiconductor wafer in a chamber at a temperature in the range of approximately 680° C. to 800° C; lowering the pressure in the chamber into the range of approximately 100 to 300 millitorr; providing a continuous flow of hydrogen gas into the chamber to substantially remove any oxygen; providing a continuous flow of titanium tetrachloride vapor and ammonia vapor into the chamber; continuing the process until a layer of titanium nitride of the desired thickness is formed on the semiconductor wafer and on a selected gate dielectric; and annealing in situ the layer of titanium nitride at a temperature of approximately 900°-1000° C.
Claim 10
Dependent Claim
27 words
A method as claimed in claim 7 wherein the volume ratio of the hydrogen, titanium tetrachloride and ammonia are in the ranges of approximately ±25% of 50:11:40.
Claim 11
Dependent Claim
23 words
A method as claimed in claim 7 wherein the semiconductor wafer is placed in the chamber at a temperature of approximately 700° C.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-02-17 | 1989-08-19 | 1990-02-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-02-17 | 1993-08-19 | 1994-02-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-02-17 | 1997-08-19 | 1998-02-18 | $7700.00 | Window Closed / Lapsed |