Patent US4567501A successfully refreshed from Google Patents.
US4567501A
Expired / Lapsed
US
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Resistor structure in integrated injection logic
Assignee: Fujitsu Ltd
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Filing: 1983-12-22
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Granted: 1986-01-28
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Expires: 2003-12-22
Abstract
Abstract An I 2 L semiconductor device in which a p-type buried layer is formed on an n + type silicon substrate by diffusion of boron, an epitaxial n-type layer is grown on the p-type buried layer, a p + type region is formed in a ring shape to surround the epitaxial n-type layer with the bottom of the p + region reaching to the p-type buried layer, an n-type resistor layer is formed in the epitaxial n-type layer by diffusion of phosphorus, and connections for electrodes are formed by diffusion of n + type impurities in such a manner that the connections make contact with the resistor layer.
Inventors
- 👤 Takeshi Fukuda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 03:27
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/65; H10D84/658; H10D1/00; H10D1/40; H10D1/43; H10D84/01; H10D84/0112; H10D84/0116; H10D84/02; H10D84/03; H10D84/038; H10D84/101; H10D84/121; H10D84/125; H10D84/611
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
181 words
A semiconductor device including an integrated injection logic device and a resistor element comprising: a semiconductor substrate of a first conductivity type; a semiconductor layer of said first conductivity type formed on said semiconductor substrate; a buried layer of a second conductivity type opposite to said first conductivity type formed between said semiconductor substrate and said semiconductor layer; a ring shaped diffused region of said second conductivity type reaching to said buried layer and surrounding an area of said semiconductor layer on said buried layer; a resistor semiconductor region of said first conductivity type formed in said area; a pair of diffused regions of the first conductivity type formed in said area and contacting said resistor region; and means for electrically connecting said pair of diffused regions to wirings of said semiconductor device; said integrated injection logic device including a pair of spaced apart regions of said second conductivity type and being located in said semiconductor layer and spaced from said substrate, and an additional region of said first conductivity type positioned within one of said pair of spaced apart regions.
Claim 2
Dependent Claim
181 words
A semiconductor device including an integrated injection logic device and a resistor element comprising: a semiconductor substrate of a first conductivity type; a semiconductor layer of said first conductivity type formed on said semiconductor substrate; a buried layer of a second conductivity type opposite to said first conductivity type formed between said semiconductor substrate and said semiconductor layer; a ring shaped diffused region of said second conductivity type reaching to said buried layer and surrounding an area of said semiconductor layer on said buried layer; a resistor semiconductor region of said first conductivity type formed in said area; a pair of diffused regions of the first conductivity type formed in said area and contacting said resistor region; and means for electrically connecting said pair of diffused regions to wirings of said semiconductor device; said integrated injection logic device including a pair of spaced apart regions of said second conductivity type and being located in said semiconductor layer and spaced from said substrate, and an additional region of said first conductivity type positioned within one of said pair of spaced apart regions.
Claim 3
Dependent Claim
44 words
A semiconductor device of claim 1, wherein said substrate is an n + type substrate, said buried layer is a p-type layer, said semiconductor layer is an epitaxial n-type layer grown on said buried layer, and said diffused region is a p-type diffused layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-01-27 | 1989-07-29 | 1990-01-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-01-27 | 1993-07-29 | 1994-01-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-01-27 | 1997-07-29 | 1998-01-28 | $7700.00 | Window Closed / Lapsed |