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Method of fabricating junction field effect transistors

Assignee: Verizon Laboratories Inc
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Filing: 1984-03-29
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Granted: 1985-11-12
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Expires: 2004-03-29
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Abstract

Abstract Junction field effect transistor, specifically a static induction transistor, and method of fabricating. A low resistivity N-type surface layer is formed at the surface of a high resistivity N-type epitaxial layer which has been grown on a low resistivity N-type substrate of silicon. The surface of the surface layer is coated with silicon dioxide and portions of the silicon dioxide layer are removed to expose alternating gate surface areas and source surface areas. P-type conductivity material is diffused into the silicon from the gate surface areas to produce zones of graded concentration. The difference in concentration of N-type conductivity imparting material in the surface layer and in the remainder of the epitaxial layer causes the resulting P-type gate regions to extend laterally toward each other so as to produce narrow channel regions at a depth beyond the surface layer while limiting the lateral extensions of the P-type gate regions adjacent to the surface. The device exhibits both high voltage gain and low gate capacitance.

Inventors

  • 👤 Adrian I. Cogan
  • 👤 Izak Bencuya

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 20:05
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/202; H10D62/00; H10D62/10; H10D62/17; H10D62/343

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 297 words
The method of fabricating a junction field effect transistor comprising providing a body of semiconductor material including a substrate of semiconductor material of one conductivity type of relatively low resistivity and a layer of semiconductor material of the one conductivity type of relatively high resistivity contiguous said substrate, said layer having a surface at a surface of the body; introducing conductivity type imparting material of the one conductivity type into said layer from said surface to form a surface layer of semiconductor material of the one conductivity type of relatively low resistivity adjacent to said surface and an underlying layer of semiconductor material of the one conductivity type of relatively high resistivity between said surface layer and said substrate; forming a layer of protective material adherent to said surface; removing portions of said layer of protective material to expose alternating gate surface areas and source surface areas in said surface; introducing conductivity type imparting material of the opposite conductivity type into said surface and underlying layers from said gate surface areas to produce zones of graded concentration of conductivity type imparting material of the opposite conductivity type with the highest concentration adjacent to said gate surface areas thereby forming gate regions of the opposite conductivity type extending from the gate surface areas for a greater distance into said underlying layer than into said surface layer; introducing conductivity type imparting material of the one conductivity type into said surface layer from said source surface areas to produce source regions of the one conductivity type of lower resistivity at said source surface areas; and applying conductive material to form source and gate contacts in ohmic contact with said source and gate regions at said source and gate surface areas, respectively, and to form a drain contact with said substrate.
Claim 2
Independent Claim 297 words
The method of fabricating a junction field effect transistor comprising providing a body of semiconductor material including a substrate of semiconductor material of one conductivity type of relatively low resistivity and a layer of semiconductor material of the one conductivity type of relatively high resistivity contiguous said substrate, said layer having a surface at a surface of the body; introducing conductivity type imparting material of the one conductivity type into said layer from said surface to form a surface layer of semiconductor material of the one conductivity type of relatively low resistivity adjacent to said surface and an underlying layer of semiconductor material of the one conductivity type of relatively high resistivity between said surface layer and said substrate; forming a layer of protective material adherent to said surface; removing portions of said layer of protective material to expose alternating gate surface areas and source surface areas in said surface; introducing conductivity type imparting material of the opposite conductivity type into said surface and underlying layers from said gate surface areas to produce zones of graded concentration of conductivity type imparting material of the opposite conductivity type with the highest concentration adjacent to said gate surface areas thereby forming gate regions of the opposite conductivity type extending from the gate surface areas for a greater distance into said underlying layer than into said surface layer; introducing conductivity type imparting material of the one conductivity type into said surface layer from said source surface areas to produce source regions of the one conductivity type of lower resistivity at said source surface areas; and applying conductive material to form source and gate contacts in ohmic contact with said source and gate regions at said source and gate surface areas, respectively, and to form a drain contact with said substrate.
Claim 3
Dependent Claim 61 words
The method of fabricating a junction field effect transistor in accordance with claim 1 wherein introducing conductivity type imparting material of the opposite conductivity type into said surface and underlying layers includes diffusing conductivity type imparting material of the opposite conductivity type into said zones to provide zones of graded concentration of conductivity type imparting material of the opposite conductivity type.
Claim 4
Dependent Claim 86 words
The method of fabricating a junction field effect transistor in accordance with claim 2 wherein introducing conductivity type imparting material of the one conductivity type into said layer from said surface to form a surface layer of semiconductor material of the one conductivity type of relatively low resistivity adjacent to said surface includes ion implanting conductivity type imparting material of the one conductivity type into said layer to form said surface layer of substantially uniform concentration of conductivity type imparting material of the one conductivity type.
Claim 5
Dependent Claim 84 words
The method of fabricating a junction field effect transistor in accordance with claim 2 wherein introducing conductivity type imparting material of the one conductivity type into said layer from said surface to form a surface layer of semiconductor material of the one conductivity type of relatively low resistivity adjacent to said surface includes diffusing conductivity type imparting material of the one conductivity type into said layer to form said surface layer of graded concentration of conductivity type imparting material of the one conductivity type.
Claim 6
Independent Claim 345 words
The method of fabricating a junction field effect transistor comprising providing a substrate of semiconductor material of one conductivity type of relatively low resistivity having a flat planar surface; growing an epitaxial layer of semiconductor material of the one conductivity type of relatively high resistivity on said surface of the substrate, said epitaxial layer having a flat planar surface parallel to the interface of the epitaxial layer and the substrate, said epitaxial layer and said substrate forming a body of semiconductor material; introducing conductivity type imparting material of the one conductivity type into said epitaxial layer from said surface to form a surface layer of semiconductor material of the one conductivity type of relatively low resistivity adjacent to said surface and an underlying layer of semiconductor material of the one conductivity type of relatively high resistivity between said surface layer and said substrate; forming a layer of protective material adherent to said surface; removing portions of said layer of protective material to expose alternating gate surface areas and source surface areas in said surface; introducing conductivity type imparting material of the opposite conductivity type into said epitaxial layer from said gate surface areas to produce zones of graded concentration of conductivity type imparting material of the opposite conductivity type with the highest concentration adjacent to said gate surface areas thereby forming gate regions of the opposite conductivity type extending from the gate surface areas for a greater distance into said underlying layer of semiconductor material of relatively high resistivity than into said surface layer of semiconductor material of relatively low resistivity; introducing conductivity type imparting material of the one conductivity type into said surface layer of semiconductor material of the one conductivity type of relatively low resistivity at said source surface areas to produce source regions of the one conductivity type of lower resistivity at said source surface areas; and applying conductive material to form source and gate contacts in ohmic contact with said source and gate regions at said source and gate surface areas, respectively, and to form a drain contact with said substrate.
Claim 7
Independent Claim 345 words
The method of fabricating a junction field effect transistor comprising providing a substrate of semiconductor material of one conductivity type of relatively low resistivity having a flat planar surface; growing an epitaxial layer of semiconductor material of the one conductivity type of relatively high resistivity on said surface of the substrate, said epitaxial layer having a flat planar surface parallel to the interface of the epitaxial layer and the substrate, said epitaxial layer and said substrate forming a body of semiconductor material; introducing conductivity type imparting material of the one conductivity type into said epitaxial layer from said surface to form a surface layer of semiconductor material of the one conductivity type of relatively low resistivity adjacent to said surface and an underlying layer of semiconductor material of the one conductivity type of relatively high resistivity between said surface layer and said substrate; forming a layer of protective material adherent to said surface; removing portions of said layer of protective material to expose alternating gate surface areas and source surface areas in said surface; introducing conductivity type imparting material of the opposite conductivity type into said epitaxial layer from said gate surface areas to produce zones of graded concentration of conductivity type imparting material of the opposite conductivity type with the highest concentration adjacent to said gate surface areas thereby forming gate regions of the opposite conductivity type extending from the gate surface areas for a greater distance into said underlying layer of semiconductor material of relatively high resistivity than into said surface layer of semiconductor material of relatively low resistivity; introducing conductivity type imparting material of the one conductivity type into said surface layer of semiconductor material of the one conductivity type of relatively low resistivity at said source surface areas to produce source regions of the one conductivity type of lower resistivity at said source surface areas; and applying conductive material to form source and gate contacts in ohmic contact with said source and gate regions at said source and gate surface areas, respectively, and to form a drain contact with said substrate.
Claim 8
Dependent Claim 59 words
The method of fabricating a junction field effect transistor in accordance with claim 5 wherein introducing conductivity type imparting material of the opposite conductivity type into said epitaxial layer includes diffusing conductivity type imparting material of the opposite conductivity type into said zones to provide zones of graded concentration of conductivity type imparting material of the opposite conductivity type.
Claim 9
Dependent Claim 84 words
The method of fabricating a junction field effect transistor in accordance with claim 6 wherein introducing conductivity type imparting material of the one conductivity type into said epitaxial layer from said surface to form a surface layer of semiconductor material of the one conductivity type of relatively low resistivity includes ion implanting conductivity type imparting material of the one conductivity type into said epitaxial layer to form said surface layer of substantially uniform concentration of conductivity type imparting material of the one conductivity type.
Claim 10
Dependent Claim 82 words
The method of fabricating a junction field effect transistor in accordance with claim 6 wherein introducing conductivity type imparting material of the one conductivity type into said epitaxial layer from said surface to form a surface layer of semiconductor material of the one conductivity type of relatively low resistivity includes diffusing conductivity type imparting material of the one conductivity type into said epitaxial layer to form said surface layer of graded concentration of conductivity type imparting material of the one conductivity type.
Claim 11
Dependent Claim 27 words
The method of fabricating a junction field effect transistor in accordance with claim 6 wherein the semiconductor material is silicon; and the protective material is silicon dioxide.
Claim 12
Dependent Claim 28 words
The method of fabricating a junction field effect transistor in accordance with claim 6 wherein the one conductivity type is N-type; and the opposite conductivity type is P-type.

References Cited (Backward Citations)

US3828230A Cited
US4199771A Cited
US4449284A Cited
US4477963A Cited
US4442589A Cited
US4406052A Cited
US4437925A Cited
US4497107A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-11-11 1989-05-13 1989-11-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-11-11 1993-05-13 1993-11-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-11-11 1997-05-13 1997-11-12 $7700.00 Window Closed / Lapsed

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